Hi again, Sorry to bug you, but this patch is gating for the HAL Platform I'm about to post, so if I could get you to have a look at it, I'd be happy.
Thanks, Rene -----Original Message----- From: [email protected] [mailto:[email protected]] On Behalf Of Rene Nielsen Sent: 13. februar 2009 14:04 To: [email protected] Subject: ARM9 Cache Handling The attached patch contains several changes/additions to the ARM9 variants cache implementation: The following changes affect all ARM9 variants: 1) In HAL_ICACHE_ENABLE(): Enabling the MMU should not be part of the cache routines. 2) CYGSEM_HAL_FLASH_CACHES_NODISABLE: New CDL option for controlling how HAL_FLASH_CACHES_OFF() and HAL_FLASH_CACHES_ON() are implemented. If it is not defined or 0, it'll be the good old implementation. Otherwise, these macros will be empty. Default for the option is not defined. ARM926EJ-specific changes: 3) Parameterized HAL_DCACHE_SIZE and HAL_ICACHE_SIZE. Defaults remain 8 and 16 KBytes, respectively. 4) HAL_DCACHE_STORE(): New macro for flushing part of the D-cache to memory. 5) HAL_DCACHE_INVALIDATE(): New macro for invalidating part of the D-cache. 6) HAL_DCACHE_FLUSH(): New macro for flushing and invalidating part of the D-cache. Regards, Rene Schipp von Branitz Nielsen Vitesse Semiconductors
