cortex_m3: buildfix for binutils 2.20

when building using binutils 2.20:
 - swi inst now requires an argument.
 - msr psp,sp is not allowed.

# HG changeset patch
# User Spencer Oliver <[email protected]>
# Date 1272975499 -3600
# Node ID d31e3aac03a66dd841d6b9a48c1261c00b437475
# Parent  9b59569aaea99c165f8b838325d2f6bd4951ab36
cortex_m3: buildfix for binutils 2.20

when building using binutils 2.20:
 - swi inst now requires an argument.
 - msr psp,sp is not allowed.

diff -r 9b59569aaea9 -r d31e3aac03a6 
packages/hal/cortexm/arch/current/include/hal_intr.h
--- a/packages/hal/cortexm/arch/current/include/hal_intr.h      Fri Apr 23 
12:01:39 2010 +0000
+++ b/packages/hal/cortexm/arch/current/include/hal_intr.h      Tue May 04 
13:18:19 2010 +0100
@@ -298,7 +298,7 @@
 {                                                       \
     __asm__ volatile (                                  \
         "ldr     r3,=hal_call_dsrs_vsr          \n"     \
-        "swi                                    \n"     \
+        "swi 0                                  \n"     \
         :                                               \
         :                                               \
         : "r3"                                          \
diff -r 9b59569aaea9 -r d31e3aac03a6 
packages/hal/cortexm/arch/current/src/hal_misc.c
--- a/packages/hal/cortexm/arch/current/src/hal_misc.c  Fri Apr 23 12:01:39 
2010 +0000
+++ b/packages/hal/cortexm/arch/current/src/hal_misc.c  Tue May 04 13:18:19 
2010 +0100
@@ -185,7 +185,7 @@
 
     hal_vsr_table[CYGNUM_HAL_VECTOR_SERVICE] = 
(CYG_ADDRESS)hal_switch_state_vsr;    
 
-    __asm__ volatile( "swi" );
+    __asm__ volatile( "swi 0" );
 
     hal_vsr_table[CYGNUM_HAL_VECTOR_SERVICE] = 
(CYG_ADDRESS)hal_default_svc_vsr;
     
diff -r 9b59569aaea9 -r d31e3aac03a6 
packages/hal/cortexm/arch/current/src/vectors.S
--- a/packages/hal/cortexm/arch/current/src/vectors.S   Fri Apr 23 12:01:39 
2010 +0000
+++ b/packages/hal/cortexm/arch/current/src/vectors.S   Tue May 04 13:18:19 
2010 +0100
@@ -130,7 +130,8 @@
         msr     control,r0
         isb                             // Insert a barrier
         
-        msr     psp,sp                  // Copy SP to PSP
+        mov     r0,sp
+        msr     psp,r0                  // Copy SP to PSP
 
 #if !defined(CYGPKG_KERNEL)
         sub     sp,#(CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE/2)
@@ -274,7 +275,7 @@
 hal_interrupt_end_done:
 
         ldr     r3,=hal_interrupt_end_vsr
-        swi
+        swi 0
         
 //==========================================================================   
     
 // Interrupt end VSR

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