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--- Comment #31 from Christophe Coutand <[email protected]> 2011-02-08 22:25:55 GMT --- Hi Sergei, This is not a typo but you are correct, 2 and 3 should be in the list. Value 2 and 3 are only allowed when the PLL is bypassed, so i did not know what to do with it at first. Now I see that it is fine to have it in the list, the constraint on CYGHWR_HAL_CORTEXM_LM3S8XX_SYSCLK will prevent user from selecting 2 and 3 because this would lead to a frequency (SYSCLK) larger than the maximum allowed frequency. Christophe -- Configure bugmail: http://bugs.ecos.sourceware.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are on the CC list for the bug.
