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--- Comment #51 from Mike Jones <mjo...@linear.com> ---
I tested the patches at different frequencies using code like this:
cyg_i2c_device device = { \
.i2c_bus = &cyg_i2c0_bus, \
.i2c_address = 0x0C, \
.i2c_flags = 0, \
.i2c_delay = i2c_bus_time \
};
It works at 100/400Khz properly. The there is more error in the frequency than
some end users will want. It seems to run about 10% too slow.
In the CDL "SMB register options" is misspelled. register is missing an r.
I don't have means at the moment to test SMB options. I suggest this is tested
after releasing this code. When the STM32 I2C is in a similar state to this
code, I can build hardware that supports built in ALERTB processing for both
processors and test the SMB support. The current patches seem adequate for I2C
and work fine with my large application.
I would like to test default clock speed, meaning the frequency in the CDL. How
do I write code that uses the default rather than .i2c_delay. Yes, I am being
lazy and not digging into the code.
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