Revision: 14156
          http://edk2.svn.sourceforge.net/edk2/?rev=14156&view=rev
Author:   jljusten
Date:     2013-03-04 17:38:05 +0000 (Mon, 04 Mar 2013)
Log Message:
-----------
OvmfPkg: report support for the PIIX3 reset register in the FADT

The value to be written corresponds to hard reset, which is what the ACPI
spec prescribes.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>

Modified Paths:
--------------
    trunk/edk2/OvmfPkg/AcpiTables/Facp.aslc
    trunk/edk2/OvmfPkg/AcpiTables/Platform.h

Modified: trunk/edk2/OvmfPkg/AcpiTables/Facp.aslc
===================================================================
--- trunk/edk2/OvmfPkg/AcpiTables/Facp.aslc     2013-03-04 17:37:47 UTC (rev 
14155)
+++ trunk/edk2/OvmfPkg/AcpiTables/Facp.aslc     2013-03-04 17:38:05 UTC (rev 
14156)
@@ -65,8 +65,8 @@
   0x0000,           // Boot architecture flag (16-bit)
   RESERVED,         // reserved
   FLAG,             // Fixed feature flags
-  { 0 },            // Address of the Reset Register
-  0,                // Value for the Reset Register to reset the system
+  GAS2_IO(RESET_REG, 1), // Extended address of the Reset Register
+  RESET_VALUE,           // Value for the Reset Register to reset the system
   { RESERVED },     // reserved[3]
   0,                // 64-bit physical addesss of FACS, set at installation
   0,                // 64-bit physical addesss of DSDT, set at installation

Modified: trunk/edk2/OvmfPkg/AcpiTables/Platform.h
===================================================================
--- trunk/edk2/OvmfPkg/AcpiTables/Platform.h    2013-03-04 17:37:47 UTC (rev 
14155)
+++ trunk/edk2/OvmfPkg/AcpiTables/Platform.h    2013-03-04 17:38:05 UTC (rev 
14156)
@@ -54,7 +54,10 @@
 #define FLAG            (EFI_ACPI_2_0_WBINVD | \
                          EFI_ACPI_2_0_PROC_C1 | \
                          EFI_ACPI_2_0_SLP_BUTTON | \
-                         EFI_ACPI_2_0_RTC_S4)
+                         EFI_ACPI_2_0_RTC_S4 | \
+                         EFI_ACPI_2_0_RESET_REG_SUP)
+#define RESET_REG       0xCF9
+#define RESET_VALUE     (BIT2 | BIT1) // PIIX3 Reset CPU + System Reset
 
 //
 // Byte-aligned IO port register block initializer for

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