Revision: 14191
http://edk2.svn.sourceforge.net/edk2/?rev=14191&view=rev
Author: oliviermartin
Date: 2013-03-12 01:01:11 +0000 (Tue, 12 Mar 2013)
Log Message:
-----------
ArmPkg/BdsLib: Update 'cpu-release-addr' with the UEFI locations if the method
is 'spin-table'
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.mar...@arm.com>
Modified Paths:
--------------
trunk/edk2/ArmPkg/Library/BdsLib/BdsLinuxFdt.c
Modified: trunk/edk2/ArmPkg/Library/BdsLib/BdsLinuxFdt.c
===================================================================
--- trunk/edk2/ArmPkg/Library/BdsLib/BdsLinuxFdt.c 2013-03-12 01:00:30 UTC
(rev 14190)
+++ trunk/edk2/ArmPkg/Library/BdsLib/BdsLinuxFdt.c 2013-03-12 01:01:11 UTC
(rev 14191)
@@ -452,12 +452,13 @@
}
// If Power State Coordination Interface (PSCI) is not supported then
it is expected the secondary
- // cores are spinning waiting for the Operation System to release them
+ // cores are spinning waiting for the Operating System to release them
if (PsciSmcSupported == FALSE) {
- // Before to write our method check if a method is already exposed
in the CPU node
+ // We as the bootloader are responsible for either creating or
updating
+ // these entries. Do not trust the entries in the DT. We only know
about
+ // 'spin-table' type. Do not try to update other types if defined.
Method = fdt_getprop(fdt, cpu_node, "enable-method", &lenp);
- if (Method == NULL) {
- // No 'enable-method', we can create our entries
+ if ( (Method == NULL) || (!AsciiStrCmp((CHAR8 *)Method,
"spin-table")) ) {
fdt_setprop_string(fdt, cpu_node, "enable-method", "spin-table");
CpuReleaseAddr =
cpu_to_fdt64(ArmCoreInfoTable[Index].MailboxSetAddress);
fdt_setprop(fdt, cpu_node, "cpu-release-addr", &CpuReleaseAddr,
sizeof(CpuReleaseAddr));
@@ -466,6 +467,8 @@
if (((ArmCoreInfoTable[Index].ClusterId != ClusterId) ||
(ArmCoreInfoTable[Index].CoreId != CoreId))) {
fdt_setprop_string(fdt, cpu_node, "status", "disabled");
}
+ } else {
+ Print(L"Warning: Unsupported enable-method type for CPU[%d] :
%a\n", Index, (CHAR8 *)Method);
}
}
}
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