Revision: 14277
          http://edk2.svn.sourceforge.net/edk2/?rev=14277&view=rev
Author:   vanjeff
Date:     2013-04-15 03:45:51 +0000 (Mon, 15 Apr 2013)
Log Message:
-----------
Sync part of patch r13680 and patch r13708 from main trunk.
1. Update Capsule modules to consume debug agent library to support source 
debugging in x64 code.
2. Update BootScriptExecutorDxe module to support source debugging on S3 path.
3. When SerialPortWrite() is called with a non-NULL Buffer and NumberOfBytes is 
passed in as 0, just do a flush.

Revision Links:
--------------
    http://edk2.svn.sourceforge.net/edk2/?rev=13680&view=rev
    http://edk2.svn.sourceforge.net/edk2/?rev=13708&view=rev

Modified Paths:
--------------
    
branches/UDK2010.SR1/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c
    
branches/UDK2010.SR1/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c
    branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/Capsule.h
    branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
    branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
    branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
    branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c

Modified: 
branches/UDK2010.SR1/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c
===================================================================
--- 
branches/UDK2010.SR1/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c
   2013-04-15 01:56:31 UTC (rev 14276)
+++ 
branches/UDK2010.SR1/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c
   2013-04-15 03:45:51 UTC (rev 14277)
@@ -1,7 +1,7 @@
 /** @file
   16550 UART Serial Port library functions
 
-  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
   which accompanies this distribution.  The full text of the license may be 
found at
@@ -89,10 +89,56 @@
 }
 
 /**
+  Return whether the hardware flow control signal allows writing.
+
+  @retval TRUE  The serial port is writable.
+  @retval FALSE The serial port is not writable.
+**/
+BOOLEAN
+SerialPortWritable (
+  VOID
+  )
+{
+  if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
+    if (PcdGetBool (PcdSerialDetectCable)) {
+      //
+      // Wait for both DSR and CTS to be set
+      //   DSR is set if a cable is connected.
+      //   CTS is set if it is ok to transmit data
+      //
+      //   DSR  CTS  Description                               Action
+      //   ===  ===  ========================================  ========
+      //    0    0   No cable connected.                       Wait
+      //    0    1   No cable connected.                       Wait
+      //    1    0   Cable connected, but not clear to send.   Wait
+      //    1    1   Cable connected, and clear to send.       Transmit
+      //
+      return (BOOLEAN) ((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_DSR 
| B_UART_MSR_CTS)) == (B_UART_MSR_DSR | B_UART_MSR_CTS));
+    } else {
+      //
+      // Wait for both DSR and CTS to be set OR for DSR to be clear.  
+      //   DSR is set if a cable is connected.
+      //   CTS is set if it is ok to transmit data
+      //
+      //   DSR  CTS  Description                               Action
+      //   ===  ===  ========================================  ========
+      //    0    0   No cable connected.                       Transmit
+      //    0    1   No cable connected.                       Transmit
+      //    1    0   Cable connected, but not clear to send.   Wait
+      //    1    1   Cable connected, and clar to send.        Transmit
+      //
+      return (BOOLEAN) ((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_DSR 
| B_UART_MSR_CTS)) != (B_UART_MSR_DSR));
+    }
+  }
+
+  return TRUE;
+}
+
+/**
   Initialize the serial device hardware.
   
   If no initialization is required, then return RETURN_SUCCESS.
-  If the serial device was successfuly initialized, then return RETURN_SUCCESS.
+  If the serial device was successfully initialized, then return 
RETURN_SUCCESS.
   If the serial device could not be initialized, then return 
RETURN_DEVICE_ERROR.
   
   @retval RETURN_SUCCESS        The serial device was initialized.
@@ -202,6 +248,23 @@
     return 0;
   }
 
+  if (NumberOfBytes == 0) {
+    //
+    // Flush the hardware
+    //
+
+    //
+    // Wait for both the transmit FIFO and shift register empty.
+    //
+    while ((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_TEMT) == 0);
+
+    //
+    // Wait for the hardware flow control signal
+    //
+    while (!SerialPortWritable ());
+    return 0;
+  }
+
   //
   // Compute the maximum size of the Tx FIFO
   //
@@ -226,39 +289,12 @@
     // Fill then entire Tx FIFO
     //
     for (Index = 0; Index < FifoSize && NumberOfBytes != 0; Index++, 
NumberOfBytes--, Buffer++) {
-      if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
-        if (PcdGetBool (PcdSerialDetectCable)) {
-          //
-          // Wait for both DSR and CTS to be set
-          //   DSR is set if a cable is connected.
-          //   CTS is set if it is ok to transmit data
-          //
-          //   DSR  CTS  Description                               Action
-          //   ===  ===  ========================================  ========
-          //    0    0   No cable connected.                       Wait
-          //    0    1   No cable connected.                       Wait
-          //    1    0   Cable connected, but not clear to send.   Wait
-          //    1    1   Cable connected, and clear to send.       Transmit
-          //
-          while ((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_DSR | 
B_UART_MSR_CTS)) != (B_UART_MSR_DSR | B_UART_MSR_CTS));
-        } else {
-          //
-          // Wait for both DSR and CTS to be set OR for DSR to be clear.  
-          //   DSR is set if a cable is connected.
-          //   CTS is set if it is ok to transmit data
-          //
-          //   DSR  CTS  Description                               Action
-          //   ===  ===  ========================================  ========
-          //    0    0   No cable connected.                       Transmit
-          //    0    1   No cable connected.                       Transmit
-          //    1    0   Cable connected, but not clear to send.   Wait
-          //    1    1   Cable connected, and clar to send.        Transmit
-          //
-          while ((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_DSR | 
B_UART_MSR_CTS)) == (B_UART_MSR_DSR));
-        }
-      }
-      
       //
+      // Wait for the hardware flow control signal
+      //
+      while (!SerialPortWritable ());
+
+      //
       // Write byte to the transmit buffer.
       //
       SerialPortWriteRegister (R_UART_TXBUF, *Buffer);

Modified: 
branches/UDK2010.SR1/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c
===================================================================
--- 
branches/UDK2010.SR1/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c
      2013-04-15 01:56:31 UTC (rev 14276)
+++ 
branches/UDK2010.SR1/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c
      2013-04-15 03:45:51 UTC (rev 14277)
@@ -45,21 +45,23 @@
   UINTN                                         TempStackTop;
   UINTN                                         TempStack[0x10];
   UINTN                                         AsmTransferControl16Address;
+  IA32_DESCRIPTOR                               IdtDescriptor;
 
   //
   // Disable interrupt of Debug timer, since new IDT table cannot handle it.
   //
   SaveAndSetDebugTimerInterrupt (FALSE);
 
+  AsmReadIdtr (&IdtDescriptor);
   //
   // Restore IDT for debug
   //
   SetIdtEntry (AcpiS3Context);
 
   //
-  // Initialize Debug Agent to support source level debug in S3 path.
+  // Initialize Debug Agent to support source level debug in S3 path, it will 
disable interrupt and Debug Timer.
   //
-  InitializeDebugAgent (DEBUG_AGENT_INIT_S3, NULL, NULL);
+  InitializeDebugAgent (DEBUG_AGENT_INIT_S3, (VOID *)&IdtDescriptor, NULL);
 
   //
   // Because not install BootScriptExecute PPI(used just in this module), So 
just pass NULL

Modified: branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/Capsule.h
===================================================================
--- branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/Capsule.h    
2013-04-15 01:56:31 UTC (rev 14276)
+++ branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/Capsule.h    
2013-04-15 03:45:51 UTC (rev 14277)
@@ -1,6 +1,6 @@
 /** @file
 
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions
@@ -35,6 +35,7 @@
 #include <Library/PeCoffGetEntryPointLib.h>
 #include <Library/PcdLib.h>
 #include <Library/ReportStatusCodeLib.h>
+#include <Library/DebugAgentLib.h>
 #include <IndustryStandard/PeImage.h>
 #include "Common/CommonHeader.h"
 

Modified: branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
===================================================================
--- branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf       
2013-04-15 01:56:31 UTC (rev 14276)
+++ branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf       
2013-04-15 03:45:51 UTC (rev 14277)
@@ -59,6 +59,7 @@
 [LibraryClasses.IA32]
   PeCoffGetEntryPointLib
   PcdLib
+  DebugAgentLib
 
 [Guids]
   gEfiCapsuleVendorGuid                         # ALWAYS_CONSUMED

Modified: branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
===================================================================
--- branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf       
2013-04-15 01:56:31 UTC (rev 14276)
+++ branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf       
2013-04-15 03:45:51 UTC (rev 14277)
@@ -46,6 +46,7 @@
 [LibraryClasses]
   BaseLib
   DebugLib
+  DebugAgentLib
 
 [Depex]
   FALSE

Modified: branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
===================================================================
--- branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c        
2013-04-15 01:56:31 UTC (rev 14276)
+++ branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c        
2013-04-15 03:45:51 UTC (rev 14277)
@@ -1,7 +1,7 @@
 /** @file
   Capsule update PEIM for UEFI2.0
 
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions
@@ -350,6 +350,10 @@
     AsmWriteCr3 ((UINTN) PageTableAddress);
 
     //
+    // Disable interrupt of Debug timer, since the IDT table cannot work in 
long mode
+    //
+    SaveAndSetDebugTimerInterrupt (FALSE);
+    //
     // Transfer to long mode
     //
     AsmEnablePaging64 (

Modified: branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c
===================================================================
--- branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c       
2013-04-15 01:56:31 UTC (rev 14276)
+++ branches/UDK2010.SR1/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c       
2013-04-15 03:45:51 UTC (rev 14277)
@@ -1,7 +1,7 @@
 /** @file
   The X64 entrypoint is used to process capsule in long mode.
 
-Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2012, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD 
License
 which accompanies this distribution.  The full text of the license may be 
found at
@@ -13,8 +13,12 @@
 **/
 
 #include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugAgentLib.h>
 #include "CommonHeader.h"
 
+#define EXCEPTION_VECTOR_NUMBER     0x22
+
 /**
   The X64 entrypoint is used to process capsule in long mode then
   return to 32-bit protected mode.
@@ -32,9 +36,32 @@
   SWITCH_64_TO_32_CONTEXT       *ReturnContext
 )
 {
-  EFI_STATUS    Status;
+  EFI_STATUS                    Status;
+  IA32_DESCRIPTOR               Ia32Idtr;
+  IA32_DESCRIPTOR               X64Idtr;
+  IA32_IDT_GATE_DESCRIPTOR      IdtEntryTable[EXCEPTION_VECTOR_NUMBER];
 
   //
+  // Save the IA32 IDT Descriptor
+  //
+  AsmReadIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr); 
+
+  //
+  // Setup X64 IDT table
+  //
+  ZeroMem (IdtEntryTable, sizeof (IA32_IDT_GATE_DESCRIPTOR) * 
EXCEPTION_VECTOR_NUMBER);
+  X64Idtr.Base = (UINTN) IdtEntryTable;
+  X64Idtr.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * 
EXCEPTION_VECTOR_NUMBER - 1);
+  AsmWriteIdtr ((IA32_DESCRIPTOR *) &X64Idtr);  
+
+            
+  
+  //
+  // Initialize Debug Agent to support source level debug
+  //
+  InitializeDebugAgent (DEBUG_AGENT_INIT_THUNK_PEI_IA32TOX64, (VOID *) 
&Ia32Idtr, NULL);
+
+  //
   // Call CapsuleDataCoalesce to process capsule.
   //
   Status = CapsuleDataCoalesce (
@@ -47,6 +74,15 @@
   ReturnContext->ReturnStatus = Status;
 
   //
+  // Disable interrupt of Debug timer, since the new IDT table cannot work in 
long mode
+  //
+  SaveAndSetDebugTimerInterrupt (FALSE);
+  //
+  // Restore IA32 IDT table
+  //
+  AsmWriteIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);  
+  
+  //
   // Finish to coalesce capsule, and return to 32-bit mode.
   //
   AsmDisablePaging64 (

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