Revision: 14477
http://sourceforge.net/p/edk2/code/14477
Author: oliviermartin
Date: 2013-07-17 06:23:07 +0000 (Wed, 17 Jul 2013)
Log Message:
-----------
ArmPlatformPkg: Removed the check on the CpuId to release the secondary cores
from their mailbox spinning
The idea is to remove the PCD PcdGicPrimaryCoreId to make the port easier (and
also to allow changing
the primary boot CPU without adding more platform specific code to UEFI).
There is a risk the mailboxes contain garbage at boot time. But it should be
easy enough to clear the
mailboxes when starting UEFI to workaround this limitation.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <[email protected]>
Modified Paths:
--------------
trunk/edk2/ArmPlatformPkg/PrePeiCore/MainMPCore.c
trunk/edk2/ArmPlatformPkg/PrePi/MainMPCore.c
Modified: trunk/edk2/ArmPlatformPkg/PrePeiCore/MainMPCore.c
===================================================================
--- trunk/edk2/ArmPlatformPkg/PrePeiCore/MainMPCore.c 2013-07-17 02:21:58 UTC
(rev 14476)
+++ trunk/edk2/ArmPlatformPkg/PrePeiCore/MainMPCore.c 2013-07-17 06:23:07 UTC
(rev 14477)
@@ -45,7 +45,6 @@
UINT32 CoreId;
VOID (*SecondaryStart)(VOID);
UINTN SecondaryEntryAddr;
- UINTN AcknowledgedCoreId;
ClusterId = GET_CLUSTER_ID(MpId);
CoreId = GET_CORE_ID(MpId);
@@ -88,8 +87,8 @@
SecondaryEntryAddr = MmioRead32
(ArmCoreInfoTable[Index].MailboxGetAddress);
// Acknowledge the interrupt and send End of Interrupt signal.
- ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase),
PcdGet32(PcdGicInterruptInterfaceBase), &AcknowledgedCoreId, NULL);
- } while ((SecondaryEntryAddr == 0) && (AcknowledgedCoreId != PcdGet32
(PcdGicPrimaryCoreId)));
+ ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase),
PcdGet32(PcdGicInterruptInterfaceBase), NULL, NULL);
+ } while (SecondaryEntryAddr == 0);
// Jump to secondary core entry point.
SecondaryStart = (VOID (*)())SecondaryEntryAddr;
Modified: trunk/edk2/ArmPlatformPkg/PrePi/MainMPCore.c
===================================================================
--- trunk/edk2/ArmPlatformPkg/PrePi/MainMPCore.c 2013-07-17 02:21:58 UTC
(rev 14476)
+++ trunk/edk2/ArmPlatformPkg/PrePi/MainMPCore.c 2013-07-17 06:23:07 UTC
(rev 14477)
@@ -62,7 +62,6 @@
UINT32 CoreId;
VOID (*SecondaryStart)(VOID);
UINTN SecondaryEntryAddr;
- UINTN AcknowledgedCoreId;
ClusterId = GET_CLUSTER_ID(MpId);
CoreId = GET_CORE_ID(MpId);
@@ -95,8 +94,8 @@
SecondaryEntryAddr = MmioRead32
(ArmCoreInfoTable[Index].MailboxGetAddress);
// Acknowledge the interrupt and send End of Interrupt signal.
- ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase),
PcdGet32(PcdGicInterruptInterfaceBase), &AcknowledgedCoreId, NULL);
- } while ((SecondaryEntryAddr == 0) && (AcknowledgedCoreId != PcdGet32
(PcdGicPrimaryCoreId)));
+ ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase),
PcdGet32(PcdGicInterruptInterfaceBase), NULL, NULL);
+ } while (SecondaryEntryAddr == 0);
// Jump to secondary core entry point.
SecondaryStart = (VOID (*)())SecondaryEntryAddr;
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