Revision: 14720
http://sourceforge.net/p/edk2/code/14720
Author: jljusten
Date: 2013-09-24 18:23:59 +0000 (Tue, 24 Sep 2013)
Log Message:
-----------
OvmfPkg: Remove IndustryStandard/X64Paging.h
Since we no longer building page tables in SEC C code, we no
longer need this file.
This reverts commit r14493.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Laszlo Ersek <[email protected]>
Tested-by: Laszlo Ersek <[email protected]>
Revision Links:
--------------
http://sourceforge.net/p/edk2/code/14493
Removed Paths:
-------------
trunk/edk2/OvmfPkg/Include/IndustryStandard/X64Paging.h
Deleted: trunk/edk2/OvmfPkg/Include/IndustryStandard/X64Paging.h
===================================================================
--- trunk/edk2/OvmfPkg/Include/IndustryStandard/X64Paging.h 2013-09-24
18:23:53 UTC (rev 14719)
+++ trunk/edk2/OvmfPkg/Include/IndustryStandard/X64Paging.h 2013-09-24
18:23:59 UTC (rev 14720)
@@ -1,99 +0,0 @@
-/** @file
- X64 Long Mode Virtual Memory Management Definitions
-
- References:
- 1) IA-32 Intel(R) Architecture Software Developer's Manual Volume 1:Basic
Architecture, Intel
- 2) IA-32 Intel(R) Architecture Software Developer's Manual Volume
2:Instruction Set Reference, Intel
- 3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System
Programmer's Guide, Intel
- 4) AMD64 Architecture Programmer's Manual Volume 2: System Programming
-
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD
License
-which accompanies this distribution. The full text of the license may be
found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-#ifndef _X64_PAGING_H_
-#define _X64_PAGING_H_
-
-#pragma pack(1)
-
-//
-// Page-Map Level-4 Offset (PML4) and
-// Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB
-//
-
-typedef union {
- struct {
- UINT64 Present:1; // 0 = Not present in memory, 1 =
Present in memory
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
- UINT64 WriteThrough:1; // 0 = Write-Back caching,
1=Write-Through caching
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set
by CPU)
- UINT64 Reserved:1; // Reserved
- UINT64 MustBeZero:2; // Must Be Zero
- UINT64 Available:3; // Available for use by system software
- UINT64 PageTableBaseAddress:40; // Page Table Base Address
- UINT64 AvabilableHigh:11; // Available for use by system software
- UINT64 Nx:1; // No Execute bit
- } Bits;
- UINT64 Uint64;
-} X64_PAGE_MAP_AND_DIRECTORY_POINTER;
-
-//
-// Page Table Entry 2MB
-//
-typedef union {
- struct {
- UINT64 Present:1; // 0 = Not present in memory, 1 =
Present in memory
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
- UINT64 WriteThrough:1; // 0 = Write-Back caching,
1=Write-Through caching
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set
by CPU)
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by
processor on access to page
- UINT64 MustBe1:1; // Must be 1
- UINT64 Global:1; // 0 = Not global page, 1 = global page
TLB not cleared on CR3 write
- UINT64 Available:3; // Available for use by system software
- UINT64 PAT:1; //
- UINT64 MustBeZero:8; // Must be zero;
- UINT64 PageTableBaseAddress:31; // Page Table Base Address
- UINT64 AvabilableHigh:11; // Available for use by system software
- UINT64 Nx:1; // 0 = Execute Code, 1 = No Code
Execution
- } Bits;
- UINT64 Uint64;
-} X64_PAGE_TABLE_ENTRY;
-
-//
-// Page Table Entry 1GB
-//
-typedef union {
- struct {
- UINT64 Present:1; // 0 = Not present in memory, 1 =
Present in memory
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
- UINT64 WriteThrough:1; // 0 = Write-Back caching,
1=Write-Through caching
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set
by CPU)
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by
processor on access to page
- UINT64 MustBe1:1; // Must be 1
- UINT64 Global:1; // 0 = Not global page, 1 = global page
TLB not cleared on CR3 write
- UINT64 Available:3; // Available for use by system software
- UINT64 PAT:1; //
- UINT64 MustBeZero:17; // Must be zero;
- UINT64 PageTableBaseAddress:22; // Page Table Base Address
- UINT64 AvabilableHigh:11; // Available for use by system software
- UINT64 Nx:1; // 0 = Execute Code, 1 = No Code
Execution
- } Bits;
- UINT64 Uint64;
-} X64_PAGE_TABLE_1G_ENTRY;
-
-#pragma pack()
-
-#endif
-
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