Revision: 14910
http://sourceforge.net/p/edk2/code/14910
Author: oliviermartin
Date: 2013-11-28 21:38:32 +0000 (Thu, 28 Nov 2013)
Log Message:
-----------
ArmPlatformPkg/ArmVExpressLibCTA9x4: Fixed the initial secondary core bringup
when remapping DRAM at 0x0
If the DRAM is remapped at 0x0 then we need to wake up the secondary cores from
wfe
(waiting for the memory to be initialized) as the instruction is still in the
remapped
flash region at 0x0 to make them jumping into the C-code which lives in the
NOR1 at 0x44000000 before
the region 0x0 is remapped as DRAM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <[email protected]>
Modified Paths:
--------------
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
Modified:
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
===================================================================
---
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
2013-11-28 21:38:06 UTC (rev 14909)
+++
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
2013-11-28 21:38:32 UTC (rev 14910)
@@ -33,8 +33,6 @@
MemoryAllocationLib
PL341DmcLib
PL301AxiLib
- L2X0CacheLib
- SerialPortLib
[Sources.common]
CTA9x4Helper.asm | RVCT
Modified:
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
===================================================================
---
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
2013-11-28 21:38:06 UTC (rev 14909)
+++
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
2013-11-28 21:38:32 UTC (rev 14910)
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD
License
@@ -16,7 +16,6 @@
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
-#include <Library/SerialPortLib.h>
#include <Drivers/PL341Dmc.h>
#include <Drivers/PL301Axi.h>
@@ -26,8 +25,6 @@
#include <ArmPlatform.h>
-#define SerialPrint(txt) SerialPortWrite ((UINT8*)(txt), AsciiStrLen(txt)+1);
-
ARM_CORE_INFO mVersatileExpressMpCoreInfoCTA9x4[] = {
{
// Cluster 0, Core 0
@@ -163,19 +160,8 @@
VOID
)
{
- UINT32 Value;
-
- // Memory Map remapping
- if (FeaturePcdGet(PcdNorFlashRemapping)) {
- SerialPrint ("Secure ROM at 0x0\n\r");
- } else {
- Value = MmioRead32(ARM_VE_SYS_CFGRW1_REG); //Scc - CFGRW1
- // Remap the DRAM to 0x0
- MmioWrite32(ARM_VE_SYS_CFGRW1_REG, (Value & 0x0FFFFFFF) |
ARM_VE_CFGRW1_REMAP_DRAM);
- }
-
- PL341DmcInit(ARM_VE_DMC_BASE, &DDRTimings);
- PL301AxiInit(ARM_VE_FAXI_BASE);
+ PL341DmcInit (ARM_VE_DMC_BASE, &DDRTimings);
+ PL301AxiInit (ARM_VE_FAXI_BASE);
}
EFI_STATUS
Modified:
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf
===================================================================
---
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf
2013-11-28 21:38:06 UTC (rev 14909)
+++
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf
2013-11-28 21:38:32 UTC (rev 14910)
@@ -1,5 +1,5 @@
#/* @file
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD
License
@@ -46,6 +46,7 @@
[FeaturePcd]
gArmPlatformTokenSpaceGuid.PcdStandalone
+ gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
[FixedPcd]
Modified:
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
===================================================================
---
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
2013-11-28 21:38:06 UTC (rev 14909)
+++
trunk/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
2013-11-28 21:38:32 UTC (rev 14910)
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD
License
@@ -17,12 +17,15 @@
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/PcdLib.h>
+#include <Library/SerialPortLib.h>
#include <Drivers/ArmTrustzone.h>
#include <Drivers/PL310L2Cache.h>
#include <ArmPlatform.h>
+#define SerialPrint(txt) SerialPortWrite ((UINT8*)(txt), AsciiStrLen(txt)+1)
+
/**
Initialize the Secure peripherals and memory regions
@@ -119,6 +122,22 @@
IN UINTN MpId
)
{
+ UINT32 Value;
+
+ // If the DRAM is remapped at 0x0 then we need to wake up the secondary
cores from wfe
+ // (waiting for the memory to be initialized) as the instruction is still in
the remapped
+ // flash region at 0x0 to jump in the C-code which lives in the NOR1 at
0x44000000 before
+ // the region 0x0 is remapped as DRAM.
+ if (!FeaturePcdGet (PcdNorFlashRemapping)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
+ // Replaced ArmCallWFE () in ArmPlatformPkg/Sec/SecEntryPoint.(S|asm)
+ ArmCallWFE ();
+ } else {
+ // Wake up the secondary core from ArmCallWFE () in
ArmPlatformPkg/Sec/SecEntryPoint.(S|asm)
+ ArmCallSEV ();
+ }
+ }
+
// If it is not the primary core then there is nothing to do
if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
@@ -144,5 +163,14 @@
ArmPlatformInitializeSystemMemory ();
}
+ // Memory Map remapping
+ if (FeaturePcdGet (PcdNorFlashRemapping)) {
+ SerialPrint ("Secure ROM at 0x0\n\r");
+ } else {
+ Value = MmioRead32 (ARM_VE_SYS_CFGRW1_REG); //Scc - CFGRW1
+ // Remap the DRAM to 0x0
+ MmioWrite32 (ARM_VE_SYS_CFGRW1_REG, (Value & 0x0FFFFFFF) |
ARM_VE_CFGRW1_REMAP_DRAM);
+ }
+
return RETURN_SUCCESS;
}
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