Revision: 16834
http://sourceforge.net/p/edk2/code/16834
Author: jyao1
Date: 2015-02-12 07:02:43 +0000 (Thu, 12 Feb 2015)
Log Message:
-----------
Fsp1.1 update.
Update ApiEntry.asm to use MACRO instead of direct XMM access.
Add sanity parameter check for FSP API.
Add sanity return code check for internal API.
Call LoadUcode before CarInit to meet silicon requirement.
Remove unnecessary VpdBase for PatchTable.
Add ASSERT for NULL check FSP1.1 entrypoint.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen....@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangara...@intel.com>
Reviewed-by: "Ma, Maurice" <maurice...@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudus...@intel.com>
Modified Paths:
--------------
trunk/edk2/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
trunk/edk2/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
trunk/edk2/IntelFspPkg/Include/Guid/GuidHobFspEas.h
trunk/edk2/IntelFspPkg/Include/Private/FspGlobalData.h
trunk/edk2/IntelFspPkg/Include/Private/FspPatchTable.h
trunk/edk2/IntelFspPkg/IntelFspPkg.dec
trunk/edk2/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf
trunk/edk2/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
trunk/edk2/IntelFspPkg/Tools/GenCfgOpt.py
trunk/edk2/IntelFspWrapperPkg/FspInitPei/FspInitPei.c
trunk/edk2/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c
Modified: trunk/edk2/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
===================================================================
--- trunk/edk2/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm 2015-02-11
09:28:22 UTC (rev 16833)
+++ trunk/edk2/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm 2015-02-12
07:02:43 UTC (rev 16834)
@@ -41,9 +41,8 @@
EXTERN GetBootFirmwareVolumeOffset:PROC
EXTERN Pei2LoaderSwitchStack:PROC
EXTERN FspSelfCheck(FspSelfCheckDflt):PROC
-EXTERN PlatformBasicInit(PlatformBasicInitDflt):PROC
EXTERN LoadUcode(LoadUcodeDflt):PROC
-EXTERN SecPlatformInit:PROC
+EXTERN SecPlatformInit(SecPlatformInitDflt):PROC
EXTERN SecCarInit:PROC
;
@@ -101,7 +100,7 @@
FspSelfCheckDflt ENDP
;------------------------------------------------------------------------------
-PlatformBasicInitDflt PROC NEAR PUBLIC
+SecPlatformInitDflt PROC NEAR PUBLIC
; Inputs:
; eax -> Return address
; Outputs:
@@ -116,7 +115,7 @@
xor eax, eax
exit:
jmp ebp
-PlatformBasicInitDflt ENDP
+SecPlatformInitDflt ENDP
;------------------------------------------------------------------------------
LoadUcodeDflt PROC NEAR PUBLIC
@@ -304,7 +303,6 @@
LoadUcodeDflt ENDP
EstablishStackFsp PROC NEAR PRIVATE
- ; Following is the code copied from BYTFSP, need to figure out what it is
doing..
;
; Save parameter pointer in edx
;
@@ -336,10 +334,10 @@
;
push DATA_LEN_OF_PER0 ; Size of the data region
push 30524550h ; Signature of the data region 'PER0'
- movd eax, xmm4
+ LOAD_EDX
+ push edx
+ LOAD_EAX
push eax
- movd eax, xmm5
- push eax
rdtsc
push edx
push eax
@@ -387,10 +385,18 @@
; Save timestamp into XMM4 & XMM5
;
rdtsc
- movd xmm4, edx
- movd xmm5, eax
-
+ SAVE_EAX
+ SAVE_EDX
+
;
+ ; Check Parameter
+ ;
+ mov eax, dword ptr [esp + 4]
+ cmp eax, 0
+ mov eax, 80000002h
+ jz NemInitExit
+
+ ;
; CPUID/DeviceID check
;
mov eax, @F
@@ -400,16 +406,22 @@
jnz NemInitExit
CALL_MMX SecPlatformInit
-
- ; Call Sec CAR Init
- CALL_MMX SecCarInit
+ cmp eax, 0
+ jnz NemInitExit
- ; @todo: ESP has been modified, we need to restore here.
- LOAD_REGS
- SAVE_REGS
; Load microcode
+ LOAD_ESP
CALL_MMX LoadUcode
+ cmp eax, 0
+ jnz NemInitExit
+ ; Call Sec CAR Init
+ LOAD_ESP
+ CALL_MMX SecCarInit
+ cmp eax, 0
+ jnz NemInitExit
+
+ LOAD_ESP
CALL_MMX EstablishStackFsp
NemInitExit:
Modified: trunk/edk2/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
===================================================================
--- trunk/edk2/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s 2015-02-11
09:28:22 UTC (rev 16833)
+++ trunk/edk2/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s 2015-02-12
07:02:43 UTC (rev 16834)
@@ -205,7 +205,7 @@
#------------------------------------------------------------------------------
-# PlatformBasicInitDflt
+# SecPlatformInitDflt
# Inputs:
# eax -> Return address
# Outputs:
@@ -214,15 +214,15 @@
# eax is cleared and ebp is used for return address.
# All others reserved.
#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(PlatformBasicInitDflt)
-ASM_PFX(PlatformBasicInitDflt):
+ASM_GLOBAL ASM_PFX(SecPlatformInitDflt)
+ASM_PFX(SecPlatformInitDflt):
#
# Save return address to EBP
#
movl %eax, %ebp
xorl %eax, %eax
-PlatformBasicInitDfltExit:
+SecPlatformInitDfltExit:
jmp *%ebp
@@ -244,7 +244,7 @@
#
# Save return address to EBP
#
- movd %xmm7, %ebp
+ movd %mm7, %ebp
cmpl $0x00, %esp
jz ParamError
@@ -451,8 +451,6 @@
#----------------------------------------------------------------------------
# EstablishStackFsp
#
-# Following is the code copied from BYTFSP, need to figure out what it is
doing..
-#
#----------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(EstablishStackFsp)
ASM_PFX(EstablishStackFsp):
@@ -487,10 +485,10 @@
#
pushl $DATA_LEN_OF_PER0 # Size of the data region
pushl $0x30524550 # Signature of the data region
'PER0'
- movd %xmm4, %eax
+ LOAD_EDX
+ pushl %edx
+ LOAD_EAX
pushl %eax
- movd %xmm5, %eax
- pushl %eax
rdtsc
pushl %edx
pushl %eax
@@ -537,10 +535,18 @@
# Save timestamp into XMM4 & XMM5
#
rdtsc
- movd %edx, %xmm4
- movd %eax, %xmm5
+ SAVE_EAX
+ SAVE_EDX
#
+ # Check Parameter
+ #
+ movl 4(%esp), %eax
+ cmpl $0x00, %eax
+ movl $0x80000002, %eax
+ jz NemInitExit
+
+ #
# CPUID/DeviceID check
#
movl $TempRamInitApiL0, %eax
@@ -556,31 +562,35 @@
movd %mm7, %esi
jmp ASM_PFX(SecPlatformInit)
TempRamInitApiL1:
+ cmpl $0x00, %eax
+ jnz NemInitExit
#
- # Call Sec CAR Init
+ # Load microcode
#
- movl $TempRamInitApiL2, %esi #CALL_MMX SecCarInit
+ LOAD_ESP
+ movl $TempRamInitApiL2, %esi #CALL_MMX LoadUcode
movd %mm7, %esi
- jmp ASM_PFX(SecCarInit)
+ jmp ASM_PFX(LoadUcode)
TempRamInitApiL2:
+ cmpl $0x00, %eax
+ jnz NemInitExit
- # @todo: ESP has been modified, we need to restore here.
-
- LOAD_REGS
- SAVE_REGS
-
#
- # Load microcode
+ # Call Sec CAR Init
#
- movl $TempRamInitApiL3, %esi #CALL_MMX LoadUcode
+ LOAD_ESP
+ movl $TempRamInitApiL3, %esi #CALL_MMX SecCarInit
movd %mm7, %esi
- jmp ASM_PFX(LoadUcode)
+ jmp ASM_PFX(SecCarInit)
TempRamInitApiL3:
+ cmpl $0x00, %eax
+ jnz NemInitExit
#
# EstablishStackFsp
#
+ LOAD_ESP
movl $TempRamInitApiL4, %esi #CALL_MMX EstablishStackFsp
movd %mm7, %esi
jmp ASM_PFX(EstablishStackFsp)
Modified: trunk/edk2/IntelFspPkg/Include/Guid/GuidHobFspEas.h
===================================================================
--- trunk/edk2/IntelFspPkg/Include/Guid/GuidHobFspEas.h 2015-02-11 09:28:22 UTC
(rev 16833)
+++ trunk/edk2/IntelFspPkg/Include/Guid/GuidHobFspEas.h 2015-02-12 07:02:43 UTC
(rev 16834)
@@ -16,8 +16,7 @@
#ifndef __GUID_HOB_FSP_EAS_GUID__
#define __GUID_HOB_FSP_EAS_GUID__
-extern EFI_GUID gFspBootLoaderTempMemoryGuid;
-extern EFI_GUID gFspBootLoaderTemporaryMemoryGuid; // Same as
gFspBootLoaderTempMemoryGuid
+extern EFI_GUID gFspBootLoaderTemporaryMemoryGuid;
extern EFI_GUID gFspReservedMemoryResourceHobGuid;
extern EFI_GUID gFspNonVolatileStorageHobGuid;
Modified: trunk/edk2/IntelFspPkg/Include/Private/FspGlobalData.h
===================================================================
--- trunk/edk2/IntelFspPkg/Include/Private/FspGlobalData.h 2015-02-11
09:28:22 UTC (rev 16833)
+++ trunk/edk2/IntelFspPkg/Include/Private/FspGlobalData.h 2015-02-12
07:02:43 UTC (rev 16834)
@@ -38,7 +38,6 @@
UINT8 Reserved[3];
UINT32 PerfIdx;
UINT64 PerfData[32];
-// UINT64 PerfData[FixedPcdGet32(PcdFspMaxPerfEntry)];
} FSP_GLOBAL_DATA;
#pragma pack()
Modified: trunk/edk2/IntelFspPkg/Include/Private/FspPatchTable.h
===================================================================
--- trunk/edk2/IntelFspPkg/Include/Private/FspPatchTable.h 2015-02-11
09:28:22 UTC (rev 16833)
+++ trunk/edk2/IntelFspPkg/Include/Private/FspPatchTable.h 2015-02-12
07:02:43 UTC (rev 16834)
@@ -25,7 +25,6 @@
UINT8 Reserved;
UINT32 PatchEntryNum;
UINT32 PatchData[FixedPcdGet32(PcdFspMaxPatchEntry)];
- UINT32 VpdBase;
} FSP_PATCH_TABLE;
#pragma pack()
Modified: trunk/edk2/IntelFspPkg/IntelFspPkg.dec
===================================================================
--- trunk/edk2/IntelFspPkg/IntelFspPkg.dec 2015-02-11 09:28:22 UTC (rev
16833)
+++ trunk/edk2/IntelFspPkg/IntelFspPkg.dec 2015-02-12 07:02:43 UTC (rev
16834)
@@ -49,7 +49,6 @@
# Guid define in FSP EAS
gFspHeaderFileGuid = { 0x912740BE, 0x2284, 0x4734, {
0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } }
- gFspBootLoaderTempMemoryGuid = { 0xbbcff46c, 0xc8d3, 0x4113, {
0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }
gFspBootLoaderTemporaryMemoryGuid = { 0xbbcff46c, 0xc8d3, 0x4113, {
0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }
gFspReservedMemoryResourceHobGuid = { 0x69a79759, 0x1373, 0x4367, {
0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }
gFspNonVolatileStorageHobGuid = { 0x721acf02, 0x4d77, 0x4c2a, {
0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }
Modified:
trunk/edk2/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf
===================================================================
--- trunk/edk2/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf
2015-02-11 09:28:22 UTC (rev 16833)
+++ trunk/edk2/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf
2015-02-12 07:02:43 UTC (rev 16834)
@@ -39,7 +39,7 @@
gIntelFspPkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES
[Guids]
- gFspBootLoaderTempMemoryGuid ## PRODUCES ## HOB
+ gFspBootLoaderTemporaryMemoryGuid ## PRODUCES ## HOB
[FixedPcd]
gIntelFspPkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES
Modified: trunk/edk2/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
===================================================================
--- trunk/edk2/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
2015-02-11 09:28:22 UTC (rev 16833)
+++ trunk/edk2/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
2015-02-12 07:02:43 UTC (rev 16834)
@@ -103,10 +103,11 @@
// Build a Boot Loader Temporary Memory GUID HOB
//
if (ApiMode == 0) {
- BootLoaderTempRamHob = BuildGuidHob (&gFspBootLoaderTempMemoryGuid,
BootLoaderTempRamSize);
+ BootLoaderTempRamHob = BuildGuidHob (&gFspBootLoaderTemporaryMemoryGuid,
BootLoaderTempRamSize);
} else {
- BootLoaderTempRamHob = (VOID *)AllocatePool (BootLoaderTempRamSize);
+ BootLoaderTempRamHob = (VOID *)AllocatePool (BootLoaderTempRamSize);
}
+ ASSERT(BootLoaderTempRamHob != NULL);
CopyMem (BootLoaderTempRamHob, (VOID *)BootLoaderTempRamStart,
BootLoaderTempRamSize);
OffsetGap = (UINT32)BootLoaderTempRamHob - BootLoaderTempRamStart;
Modified: trunk/edk2/IntelFspPkg/Tools/GenCfgOpt.py
===================================================================
--- trunk/edk2/IntelFspPkg/Tools/GenCfgOpt.py 2015-02-11 09:28:22 UTC (rev
16833)
+++ trunk/edk2/IntelFspPkg/Tools/GenCfgOpt.py 2015-02-12 07:02:43 UTC (rev
16834)
@@ -254,10 +254,10 @@
ElifStack[-1] = ElifStack[-1] + 1
else:
if len(DscLine) > 0 and DscLine[0] == '!':
- #
- # Current
it can only handle build switch.
- # It
does not support INF file in included dsc.
- #
+ #
+ # Current it can only handle build switch.
+ # It does not support INF file in included
dsc.
+ #
else:
if reduce(lambda x,y: x and y, IfStack):
Handle = True
@@ -619,8 +619,8 @@
ImageRev = struct.unpack('<I', BinFd.read(0x04))
BinFd.close()
- HeaderFd.write("#define VPD_IMAGE_ID 0x%016X /* '%s'
*/\n" % (ImageId[0], IdStr))
- HeaderFd.write("#define VPD_IMAGE_REV 0x%08X \n\n" %
ImageRev[0])
+ HeaderFd.write("#define FSP_IMAGE_ID 0x%016X /* '%s'
*/\n" % (ImageId[0], IdStr))
+ HeaderFd.write("#define FSP_IMAGE_REV 0x%08X \n\n" %
ImageRev[0])
HeaderFd.write("typedef struct _" + Region[0] + "PD_DATA_REGION
{\n")
NextOffset = 0
Modified: trunk/edk2/IntelFspWrapperPkg/FspInitPei/FspInitPei.c
===================================================================
--- trunk/edk2/IntelFspWrapperPkg/FspInitPei/FspInitPei.c 2015-02-11
09:28:22 UTC (rev 16833)
+++ trunk/edk2/IntelFspWrapperPkg/FspInitPei/FspInitPei.c 2015-02-12
07:02:43 UTC (rev 16834)
@@ -42,17 +42,21 @@
return EFI_DEVICE_ERROR;
}
+ ASSERT (FspHeader->TempRamInitEntryOffset != 0);
+ ASSERT (FspHeader->FspInitEntryOffset != 0);
+ ASSERT (FspHeader->NotifyPhaseEntryOffset != 0);
+
if ((PcdGet8 (PcdFspApiVersion) >= 2) &&
(FspHeader->HeaderRevision >= FSP_HEADER_REVISION_2) &&
- (FspHeader->ApiEntryNum >= 6) &&
- (FspHeader->FspMemoryInitEntryOffset != 0) &&
- (FspHeader->TempRamExitEntryOffset != 0) &&
- (FspHeader->FspSiliconInitEntryOffset != 0) ) {
- PcdFspApiVersion = FSP_HEADER_REVISION_2;
+ (FspHeader->ApiEntryNum >= 6) ) {
+ ASSERT (FspHeader->FspMemoryInitEntryOffset != 0);
+ ASSERT (FspHeader->TempRamExitEntryOffset != 0);
+ ASSERT (FspHeader->FspSiliconInitEntryOffset != 0);
+ PcdFspApiVersion = PcdGet8 (PcdFspApiVersion);
}
DEBUG ((DEBUG_INFO, "PcdFspApiVersion - 0x%x\n", PcdFspApiVersion));
- if (PcdFspApiVersion == FSP_HEADER_REVISION_1) {
+ if (PcdFspApiVersion == 1) {
PeiFspInitV1 (FspHeader);
} else {
PeiFspInitV2 (FspHeader);
Modified: trunk/edk2/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c
===================================================================
--- trunk/edk2/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c 2015-02-11
09:28:22 UTC (rev 16833)
+++ trunk/edk2/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c 2015-02-12
07:02:43 UTC (rev 16834)
@@ -169,6 +169,7 @@
FspMemoryInitParams.NvsBufferPtr = GetNvsBuffer ();
DEBUG ((DEBUG_INFO, "NvsBufferPtr - 0x%x\n",
FspMemoryInitParams.NvsBufferPtr));
FspMemoryInitParams.RtBufferPtr = (VOID *)&FspRtBuffer;
+ FspHobList = NULL;
FspMemoryInitParams.HobListPtr = &FspHobList;
DEBUG ((DEBUG_INFO, "FspMemoryInitParams - 0x%x\n", &FspMemoryInitParams));
@@ -184,6 +185,7 @@
ASSERT_EFI_ERROR (Status);
DEBUG ((DEBUG_INFO, " HobListPtr (returned) - 0x%x\n", FspHobList));
+ ASSERT (FspHobList != NULL);
FspHobProcessForMemoryResource (FspHobList);
------------------------------------------------------------------------------
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