Revision: 16875
http://sourceforge.net/p/edk2/code/16875
Author: oliviermartin
Date: 2015-02-16 10:27:02 +0000 (Mon, 16 Feb 2015)
Log Message:
-----------
ArmPkg/ArmGic: enable ARE bit before driving GICv3 in native mode
The GICv3 driver must use native mode to drive a GICv3 due to
the fact that v2 compatibility is optional in the v3 spec.
However, if v2 compatibility is implemented, it is the default
and needs to be disabled first by setting the Affinity Routing
Enable (ARE) bit.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <[email protected]>
Reviewed-by: Olivier Martin <[email protected]>
[added PCD that allows forcing the GICv3 driver to drive the GIC in v2 mode]
Signed-off-by: Olivier Martin <[email protected]>
Tested-by: Ard Biesheuvel <[email protected]>
Reviewed-by: Ard Biesheuvel <[email protected]>
Modified Paths:
--------------
trunk/edk2/ArmPkg/ArmPkg.dec
trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.c
trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.inf
trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
trunk/edk2/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
trunk/edk2/ArmPkg/Include/Library/ArmGicLib.h
Modified: trunk/edk2/ArmPkg/ArmPkg.dec
===================================================================
--- trunk/edk2/ArmPkg/ArmPkg.dec 2015-02-16 10:23:42 UTC (rev 16874)
+++ trunk/edk2/ArmPkg/ArmPkg.dec 2015-02-16 10:27:02 UTC (rev 16875)
@@ -69,6 +69,9 @@
# Linux (instead of PSCI)
gArmTokenSpaceGuid.PcdArmLinuxSpinTable|FALSE|BOOLEAN|0x00000033
+ # Define if the GICv3 controller should use the GICv2 legacy
+ gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042
+
[PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006
Modified: trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf 2015-02-16 10:23:42 UTC
(rev 16874)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf 2015-02-16 10:27:02 UTC
(rev 16875)
@@ -1,7 +1,7 @@
#/** @file
#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2012 - 2014, ARM Ltd. All rights reserved.<BR>
+# Copyright (c) 2012 - 2015, ARM Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD
License
@@ -54,6 +54,7 @@
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicRedistributorsBase
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
+ gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy
[Depex]
gEfiCpuArchProtocolGuid
Modified: trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.c
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.c 2015-02-16 10:23:42 UTC
(rev 16874)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.c 2015-02-16 10:27:02 UTC
(rev 16875)
@@ -186,7 +186,7 @@
RegShift = Source % 32;
Revision = ArmGicGetSupportedArchRevision ();
- if (Revision == ARM_GIC_ARCH_REVISION_2) {
+ if ((Revision == ARM_GIC_ARCH_REVISION_2) || FeaturePcdGet
(PcdArmGicV3WithV2Legacy)) {
// Write set-enable register
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset), 1 <<
RegShift);
} else {
@@ -219,7 +219,7 @@
RegShift = Source % 32;
Revision = ArmGicGetSupportedArchRevision ();
- if (Revision == ARM_GIC_ARCH_REVISION_2) {
+ if ((Revision == ARM_GIC_ARCH_REVISION_2) || FeaturePcdGet
(PcdArmGicV3WithV2Legacy)) {
// Write clear-enable register
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset), 1 <<
RegShift);
} else {
@@ -252,7 +252,7 @@
RegShift = Source % 32;
Revision = ArmGicGetSupportedArchRevision ();
- if (Revision == ARM_GIC_ARCH_REVISION_2) {
+ if ((Revision == ARM_GIC_ARCH_REVISION_2) || FeaturePcdGet
(PcdArmGicV3WithV2Legacy)) {
Interrupts = ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDISER + (4 *
RegOffset)) & (1 << RegShift)) != 0);
} else {
GicCpuRedistributorBase = GicGetCpuRedistributorBase
(GicRedistributorBase, Revision);
Modified: trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.inf
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.inf 2015-02-16 10:23:42 UTC
(rev 16874)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicLib.inf 2015-02-16 10:27:02 UTC
(rev 16875)
@@ -47,3 +47,6 @@
[Pcd]
gArmPlatformTokenSpaceGuid.PcdCoreCount
+
+[FeaturePcd]
+ gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy
Modified: trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf 2015-02-16 10:23:42 UTC
(rev 16874)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf 2015-02-16 10:27:02 UTC
(rev 16875)
@@ -48,3 +48,6 @@
[Pcd]
gArmPlatformTokenSpaceGuid.PcdCoreCount
+
+[FeaturePcd]
+ gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy
Modified: trunk/edk2/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
===================================================================
--- trunk/edk2/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c 2015-02-16
10:23:42 UTC (rev 16874)
+++ trunk/edk2/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c 2015-02-16
10:27:02 UTC (rev 16875)
@@ -249,6 +249,14 @@
mGicRedistributorsBase = PcdGet32 (PcdGicRedistributorsBase);
mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
+ //
+ // We will be driving this GIC in native v3 mode, i.e., with Affinity
+ // Routing enabled. So ensure that the ARE bit is set.
+ //
+ if (!FeaturePcdGet (PcdArmGicV3WithV2Legacy)) {
+ MmioOr32 (mGicDistributorBase + ARM_GIC_ICDDCR, ARM_GIC_ICDDCR_ARE);
+ }
+
for (Index = 0; Index < mGicNumInterrupts; Index++) {
GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index);
Modified: trunk/edk2/ArmPkg/Include/Library/ArmGicLib.h
===================================================================
--- trunk/edk2/ArmPkg/Include/Library/ArmGicLib.h 2015-02-16 10:23:42 UTC
(rev 16874)
+++ trunk/edk2/ArmPkg/Include/Library/ArmGicLib.h 2015-02-16 10:27:02 UTC
(rev 16875)
@@ -53,6 +53,9 @@
// GICv3 specific registers
#define ARM_GICD_IROUTER 0x6100 // Interrupt Routing Registers
+// the Affinity Routing Enable (ARE) bit in GICD_CTLR
+#define ARM_GIC_ICDDCR_ARE (1 << 4)
+
//
// GIC Redistributor
//
------------------------------------------------------------------------------
Download BIRT iHub F-Type - The Free Enterprise-Grade BIRT Server
from Actuate! Instantly Supercharge Your Business Reports and Dashboards
with Interactivity, Sharing, Native Excel Exports, App Integration & more
Get technology previously reserved for billion-dollar corporations, FREE
http://pubads.g.doubleclick.net/gampad/clk?id=190641631&iu=/4140/ostg.clktrk
_______________________________________________
edk2-commits mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/edk2-commits
