Revision: 16905
http://sourceforge.net/p/edk2/code/16905
Author: lersek
Date: 2015-02-23 16:03:46 +0000 (Mon, 23 Feb 2015)
Log Message:
-----------
ArmVirtualizationPkg/PciHostBridgeDxe: allocate IO BARs top-down
Currently we allocate IO BARs bottom-up in the
EfiPciHostBridgeAllocateResources phase of the enumeration.
> GCD:AddIoSpace(Base=0000000000000000,Length=0000000000010000)
> GcdIoType = I/O
> Status = Success
> GCDIoType Range
> ========== =================================
> I/O 0000000000000000-000000000000FFFF
Because the IO aperture is based at zero, the first allocation happens to
get the zero address. However, a zero address for a PCI BAR is considered
unmapped; see eg.:
- <http://www.pcisig.com/reflector/msg00459.html>,
- the (new_addr == 0) part in QEMU, pci_bar_address() [hw/pci/pci.c]:
new_addr = pci_get_long(d->config + bar) & ~(size - 1);
last_addr = new_addr + size - 1;
/* Check if 32 bit BAR wraps around explicitly.
* TODO: make priorities correct and remove this work around.
*/
if (last_addr <= new_addr || new_addr == 0 || last_addr >= UINT32_MAX)
{
return PCI_BAR_UNMAPPED;
}
We can avoid this problem by allocating top-down in the IO aperture.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <[email protected]>
Reviewed-by: Olivier Martin <[email protected]>
Modified Paths:
--------------
trunk/edk2/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
Modified:
trunk/edk2/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
===================================================================
---
trunk/edk2/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
2015-02-23 16:03:42 UTC (rev 16904)
+++
trunk/edk2/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
2015-02-23 16:03:46 UTC (rev 16905)
@@ -389,8 +389,9 @@
BitsOfAlignment = 0;
}
+ BaseAddress = mResAperture[0][0].IoLimit;
Status = gDS->AllocateIoSpace (
- EfiGcdAllocateAnySearchBottomUp,
+ EfiGcdAllocateMaxAddressSearchTopDown,
EfiGcdIoTypeIo,
BitsOfAlignment,
AddrLen,
------------------------------------------------------------------------------
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