Revision: 17034
http://sourceforge.net/p/edk2/code/17034
Author: zwei4
Date: 2015-03-10 03:16:48 +0000 (Tue, 10 Mar 2015)
Log Message:
-----------
Add code to identify D0 stepping ValleyView SoC.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Shifei Lu <[email protected]>
Reviewed-by: David Wei <[email protected]>
Modified Paths:
--------------
trunk/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/PchRegsPcu.h
trunk/edk2/Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c
Modified:
trunk/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/PchRegsPcu.h
===================================================================
---
trunk/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/PchRegsPcu.h
2015-03-10 03:11:24 UTC (rev 17033)
+++
trunk/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/PchRegsPcu.h
2015-03-10 03:16:48 UTC (rev 17034)
@@ -119,6 +119,8 @@
#define V_PCH_LPC_RID_B 0x0C // B3 Stepping (25 x
27)
#define V_PCH_LPC_RID_C 0x0D // C0 Stepping (17 x
17)
#define V_PCH_LPC_RID_D 0x0E // C0 Stepping (25 x
27)
+#define V_PCH_LPC_RID_E 0x10 // D0 Stepping (17 x
17)
+#define V_PCH_LPC_RID_F 0x11 // D0 Stepping (25 x
27)
#define R_PCH_LPC_MLT 0x0D // Master Latency Timer
#define B_PCH_LPC_MLT_MLC 0xF8 // Master Latency Count
Modified:
trunk/edk2/Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c
===================================================================
--- trunk/edk2/Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c
2015-03-10 03:11:24 UTC (rev 17033)
+++ trunk/edk2/Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c
2015-03-10 03:16:48 UTC (rev 17034)
@@ -92,7 +92,12 @@
case V_PCH_LPC_RID_D:
return PchC0;
break;
-
+
+ case V_PCH_LPC_RID_E:
+ case V_PCH_LPC_RID_F:
+ return PchD0;
+ break;
+
default:
return PchSteppingMax;
break;
------------------------------------------------------------------------------
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