Revision: 17955
http://sourceforge.net/p/edk2/code/17955
Author: lersek
Date: 2015-07-14 12:01:57 +0000 (Tue, 14 Jul 2015)
Log Message:
-----------
OvmfPkg: PciHostBridgeDxe: eliminate nominal support for multiple host bridges
The entry point function of this driver, InitializePciHostBridge(), and
the static storage duration objects it relies on, are speculatively
generic -- they nominally support more than one host bridges, but (a) the
code hardwires the number of host bridges as 1, (b) it's very unlikely
that we'd ever like to raise that number (especially by open-coding it).
So let's just remove the the nominal support, and simplify the code.
This patch is best viewed with "git show -b".
Cc: Jordan Justen <[email protected]>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <[email protected]>
Regression-tested-by: Gabriel Somlo <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Modified Paths:
--------------
trunk/edk2/OvmfPkg/PciHostBridgeDxe/PciHostBridge.c
trunk/edk2/OvmfPkg/PciHostBridgeDxe/PciHostBridge.h
Modified: trunk/edk2/OvmfPkg/PciHostBridgeDxe/PciHostBridge.c
===================================================================
--- trunk/edk2/OvmfPkg/PciHostBridgeDxe/PciHostBridge.c 2015-07-14 12:01:52 UTC
(rev 17954)
+++ trunk/edk2/OvmfPkg/PciHostBridgeDxe/PciHostBridge.c 2015-07-14 12:01:57 UTC
(rev 17955)
@@ -2,6 +2,7 @@
Provides the basic interfaces to abstract a PCI Host Bridge Resource
Allocation
+ Copyright (C) 2015, Red Hat, Inc.
Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
@@ -22,42 +23,40 @@
// Root Bridge's device path
// Root Bridge's resource aperture
//
-UINTN RootBridgeNumber[1] = { 1 };
+UINTN RootBridgeNumber = 1;
-UINT64 RootBridgeAttribute[1][1] = {
- { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM }
+UINT64 RootBridgeAttribute[1] = {
+ EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM
};
-EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
+EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1] = {
{
{
{
+ ACPI_DEVICE_PATH,
+ ACPI_DP,
{
- ACPI_DEVICE_PATH,
- ACPI_DP,
- {
- (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
- (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
- }
- },
- EISA_PNP_ID(0x0A03),
- 0
+ (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
+ (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
+ }
},
+ EISA_PNP_ID(0x0A03),
+ 0
+ },
+ {
+ END_DEVICE_PATH_TYPE,
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,
{
- END_DEVICE_PATH_TYPE,
- END_ENTIRE_DEVICE_PATH_SUBTYPE,
- {
- END_DEVICE_PATH_LENGTH,
- 0
- }
+ END_DEVICE_PATH_LENGTH,
+ 0
}
}
}
};
-PCI_ROOT_BRIDGE_RESOURCE_APERTURE mResAperture[1][1] = {
- {{0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}}
+PCI_ROOT_BRIDGE_RESOURCE_APERTURE mResAperture[1] = {
+ {0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}
};
EFI_HANDLE mDriverImageHandle;
@@ -103,7 +102,6 @@
)
{
EFI_STATUS Status;
- UINTN Loop1;
UINTN Loop2;
PCI_HOST_BRIDGE_INSTANCE *HostBridge;
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
@@ -113,63 +111,61 @@
//
// Create Host Bridge Device Handle
//
- for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {
- HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE),
- &mPciHostBridgeInstanceTemplate);
- if (HostBridge == NULL) {
+ HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE),
+ &mPciHostBridgeInstanceTemplate);
+ if (HostBridge == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ HostBridge->RootBridgeNumber = RootBridgeNumber;
+ InitializeListHead (&HostBridge->Head);
+
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &HostBridge->HostBridgeHandle,
+ &gEfiPciHostBridgeResourceAllocationProtocolGuid,
+ &HostBridge->ResAlloc,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ FreePool (HostBridge);
+ return EFI_DEVICE_ERROR;
+ }
+
+ //
+ // Create Root Bridge Device Handle in this Host Bridge
+ //
+
+ for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
+ PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
+ if (PrivateData == NULL) {
return EFI_OUT_OF_RESOURCES;
}
- HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];
- InitializeListHead (&HostBridge->Head);
+ PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
+ PrivateData->DevicePath =
+ (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop2];
- Status = gBS->InstallMultipleProtocolInterfaces (
- &HostBridge->HostBridgeHandle,
- &gEfiPciHostBridgeResourceAllocationProtocolGuid,
- &HostBridge->ResAlloc,
+ RootBridgeConstructor (
+ &PrivateData->Io,
+ HostBridge->HostBridgeHandle,
+ RootBridgeAttribute[Loop2],
+ &mResAperture[Loop2]
+ );
+
+ Status = gBS->InstallMultipleProtocolInterfaces(
+ &PrivateData->Handle,
+ &gEfiDevicePathProtocolGuid,
+ PrivateData->DevicePath,
+ &gEfiPciRootBridgeIoProtocolGuid,
+ &PrivateData->Io,
NULL
);
if (EFI_ERROR (Status)) {
- FreePool (HostBridge);
+ FreePool(PrivateData);
return EFI_DEVICE_ERROR;
}
- //
- // Create Root Bridge Device Handle in this Host Bridge
- //
-
- for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
- PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
- if (PrivateData == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
-
- PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
- PrivateData->DevicePath =
- (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];
-
- RootBridgeConstructor (
- &PrivateData->Io,
- HostBridge->HostBridgeHandle,
- RootBridgeAttribute[Loop1][Loop2],
- &mResAperture[Loop1][Loop2]
- );
-
- Status = gBS->InstallMultipleProtocolInterfaces(
- &PrivateData->Handle,
- &gEfiDevicePathProtocolGuid,
- PrivateData->DevicePath,
- &gEfiPciRootBridgeIoProtocolGuid,
- &PrivateData->Io,
- NULL
- );
- if (EFI_ERROR (Status)) {
- FreePool(PrivateData);
- return EFI_DEVICE_ERROR;
- }
-
- InsertTailList (&HostBridge->Head, &PrivateData->Link);
- }
+ InsertTailList (&HostBridge->Head, &PrivateData->Link);
}
return EFI_SUCCESS;
Modified: trunk/edk2/OvmfPkg/PciHostBridgeDxe/PciHostBridge.h
===================================================================
--- trunk/edk2/OvmfPkg/PciHostBridgeDxe/PciHostBridge.h 2015-07-14 12:01:52 UTC
(rev 17954)
+++ trunk/edk2/OvmfPkg/PciHostBridgeDxe/PciHostBridge.h 2015-07-14 12:01:57 UTC
(rev 17955)
@@ -37,12 +37,6 @@
#include <Library/IoLib.h>
#include <Library/PciLib.h>
-//
-// Hard code the host bridge number in the platform.
-// In this chipset, there is only one host bridge.
-//
-#define HOST_BRIDGE_NUMBER 1
-
#define MAX_PCI_DEVICE_NUMBER 31
#define MAX_PCI_FUNCTION_NUMBER 7
#define MAX_PCI_REG_ADDRESS 0xFF
------------------------------------------------------------------------------
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