Revision: 18235
http://sourceforge.net/p/edk2/code/18235
Author: erictian
Date: 2015-08-19 03:41:38 +0000 (Wed, 19 Aug 2015)
Log Message:
-----------
MdeModulePkg/Xhci: make all timeout values be consistent with comments.
In the original code, there exists some mismatches between the real
waiting time and the corresponding timeout comments. For example, the
XHC_GENERIC_TIMEOUT comment says it's 10ms timeout value, but the real
code in fact waits 10s.
So the code is refined to be consistent in code logic and comments.
Note XHC_POLL_DELAY macro also be removed and the polling interval in
XhcWaitOpRegBit() is changed from 1ms to 1us to keep same code style
with other code. It has no real functionality impact.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <[email protected]>
Reviewed-by: Star Zeng <[email protected]>
Modified Paths:
--------------
trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c
trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h
trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
Modified: trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
===================================================================
--- trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h 2015-08-18 16:08:22 UTC
(rev 18234)
+++ trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h 2015-08-19 03:41:38 UTC
(rev 18235)
@@ -2,7 +2,7 @@
Provides some data structure definitions used by the XHCI host controller
driver.
-Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -47,25 +47,20 @@
//
#define XHC_1_MICROSECOND (1)
//
-// Convert millisecond to microsecond.
+// The unit is microsecond, setting it as 1ms.
//
#define XHC_1_MILLISECOND (1000)
//
// XHC generic timeout experience values.
-// The unit is microsecond, setting it as 10ms.
+// The unit is millisecond, setting it as 10s.
//
#define XHC_GENERIC_TIMEOUT (10 * 1000)
//
// XHC reset timeout experience values.
-// The unit is microsecond, setting it as 1s.
+// The unit is millisecond, setting it as 1s.
//
-#define XHC_RESET_TIMEOUT (1000 * 1000)
+#define XHC_RESET_TIMEOUT (1000)
//
-// XHC delay experience value for polling operation.
-// The unit is microsecond, set it as 1ms.
-//
-#define XHC_POLL_DELAY (1000)
-//
// XHC async transfer timer interval, set by experience.
// The unit is 100us, takes 1ms as interval.
//
Modified: trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
===================================================================
--- trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c 2015-08-18 16:08:22 UTC
(rev 18234)
+++ trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c 2015-08-19 03:41:38 UTC
(rev 18235)
@@ -2,7 +2,7 @@
The XHCI register operation routines.
-Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -499,7 +499,7 @@
@param Offset The offset of the operation register.
@param Bit The bit of the register to wait for.
@param WaitToSet Wait the bit to set or clear.
- @param Timeout The time to wait before abort (in microsecond, us).
+ @param Timeout The time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS The bit successfully changed by host controller.
@retval EFI_TIMEOUT The time out occurred.
@@ -515,16 +515,16 @@
)
{
UINT32 Index;
- UINTN Loop;
+ UINT64 Loop;
- Loop = (Timeout / XHC_POLL_DELAY) + 1;
+ Loop = Timeout * XHC_1_MILLISECOND;
for (Index = 0; Index < Loop; Index++) {
if (XHC_REG_BIT_IS_SET (Xhc, Offset, Bit) == WaitToSet) {
return EFI_SUCCESS;
}
- gBS->Stall (XHC_POLL_DELAY);
+ gBS->Stall (XHC_1_MICROSECOND);
}
return EFI_TIMEOUT;
@@ -656,7 +656,7 @@
Reset the XHCI host controller.
@param Xhc The XHCI Instance.
- @param Timeout Time to wait before abort (in microsecond, us).
+ @param Timeout Time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS The XHCI host controller is reset.
@return Others Failed to reset the XHCI before Timeout.
@@ -698,7 +698,7 @@
Halt the XHCI host controller.
@param Xhc The XHCI Instance.
- @param Timeout Time to wait before abort (in microsecond, us).
+ @param Timeout Time to wait before abort (in millisecond, ms).
@return EFI_SUCCESS The XHCI host controller is halt.
@return EFI_TIMEOUT Failed to halt the XHCI before Timeout.
@@ -722,7 +722,7 @@
Set the XHCI host controller to run.
@param Xhc The XHCI Instance.
- @param Timeout Time to wait before abort (in microsecond, us).
+ @param Timeout Time to wait before abort (in millisecond, ms).
@return EFI_SUCCESS The XHCI host controller is running.
@return EFI_TIMEOUT Failed to set the XHCI to run before Timeout.
Modified: trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
===================================================================
--- trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c 2015-08-18 16:08:22 UTC
(rev 18234)
+++ trunk/edk2/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c 2015-08-19 03:41:38 UTC
(rev 18235)
@@ -1215,7 +1215,7 @@
{
EFI_STATUS Status;
UINTN Index;
- UINTN Loop;
+ UINT64 Loop;
UINT8 SlotId;
UINT8 Dci;
BOOLEAN Finished;
Modified: trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c
===================================================================
--- trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c 2015-08-18 16:08:22 UTC
(rev 18234)
+++ trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.c 2015-08-19 03:41:38 UTC
(rev 18235)
@@ -2,7 +2,7 @@
PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid
which is used to enable recovery function from USB Drivers.
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -161,7 +161,7 @@
@param Offset The offset of the operational register.
@param Bit The bit mask of the register to wait for.
@param WaitToSet Wait the bit to set or clear.
- @param Timeout The time to wait before abort (in microsecond, us).
+ @param Timeout The time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS The bit successfully changed by host controller.
@retval EFI_TIMEOUT The time out occurred.
@@ -176,14 +176,14 @@
IN UINT32 Timeout
)
{
- UINT32 Index;
+ UINT64 Index;
- for (Index = 0; Index < Timeout / XHC_POLL_DELAY + 1; Index++) {
+ for (Index = 0; Index < Timeout * XHC_1_MILLISECOND; Index++) {
if (XHC_REG_BIT_IS_SET (Xhc, Offset, Bit) == WaitToSet) {
return EFI_SUCCESS;
}
- MicroSecondDelay (XHC_POLL_DELAY);
+ MicroSecondDelay (XHC_1_MICROSECOND);
}
return EFI_TIMEOUT;
@@ -381,7 +381,7 @@
Reset the host controller.
@param Xhc The XHCI device.
- @param Timeout Time to wait before abort (in microsecond, us).
+ @param Timeout Time to wait before abort (in millisecond, ms).
@retval EFI_TIMEOUT The transfer failed due to time out.
@retval Others Failed to reset the host.
Modified: trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h
===================================================================
--- trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h 2015-08-18 16:08:22 UTC
(rev 18234)
+++ trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhcPeim.h 2015-08-19 03:41:38 UTC
(rev 18235)
@@ -1,7 +1,7 @@
/** @file
Private Header file for Usb Host Controller PEIM
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -48,21 +48,20 @@
//
// XHC reset timeout experience values.
-// The unit is microsecond, setting it as 1s.
+// The unit is millisecond, setting it as 1s.
//
-#define XHC_RESET_TIMEOUT (1 * XHC_1_SECOND)
-//
-// XHC delay experience value for polling operation.
-// The unit is microsecond, set it as 1ms.
-//
-#define XHC_POLL_DELAY (1 * XHC_1_MILLISECOND)
+#define XHC_RESET_TIMEOUT (1000)
//
// Wait for root port state stable.
//
#define XHC_ROOT_PORT_STATE_STABLE (200 * XHC_1_MILLISECOND)
-#define XHC_GENERIC_TIMEOUT (10 * XHC_1_MILLISECOND)
+//
+// XHC generic timeout experience values.
+// The unit is millisecond, setting it as 10s.
+//
+#define XHC_GENERIC_TIMEOUT (10 * 1000)
#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) &
0XFFFFFFFF))
Modified: trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
===================================================================
--- trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c 2015-08-18 16:08:22 UTC
(rev 18234)
+++ trunk/edk2/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c 2015-08-19 03:41:38 UTC
(rev 18235)
@@ -736,7 +736,7 @@
{
EFI_STATUS Status;
UINTN Index;
- UINTN Loop;
+ UINT64 Loop;
UINT8 SlotId;
UINT8 Dci;
BOOLEAN Finished;
------------------------------------------------------------------------------
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