Revision: 18898
http://sourceforge.net/p/edk2/code/18898
Author: abiesheuvel
Date: 2015-11-18 15:59:42 +0000 (Wed, 18 Nov 2015)
Log Message:
-----------
ArmPkg/ArmV7Lib: fix definition of TTBR_NON_INNER_CACHEABLE
The definition of TTBR_NON_INNER_CACHEABLE should be bit 0 cleared, not
bit 0 set. Furthermore, the name is inconsistent with the other definitions
so rename it to TTBR_INNER_NON_CACHEABLE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <[email protected]>
Reviewed-by: Leif Lindholm <[email protected]>
Modified Paths:
--------------
trunk/edk2/ArmPkg/Include/Chipset/ArmV7Mmu.h
Modified: trunk/edk2/ArmPkg/Include/Chipset/ArmV7Mmu.h
===================================================================
--- trunk/edk2/ArmPkg/Include/Chipset/ArmV7Mmu.h 2015-11-18 15:59:22 UTC
(rev 18897)
+++ trunk/edk2/ArmPkg/Include/Chipset/ArmV7Mmu.h 2015-11-18 15:59:42 UTC
(rev 18898)
@@ -23,7 +23,7 @@
#define TTBR_SHAREABLE BIT1
#define TTBR_NON_SHAREABLE 0
#define TTBR_INNER_CACHEABLE BIT0
-#define TTBR_NON_INNER_CACHEABLE BIT0
+#define TTBR_INNER_NON_CACHEABLE 0
#define TTBR_RGN_INNER_NON_CACHEABLE 0
#define TTBR_RGN_INNER_WRITE_BACK_ALLOC BIT6
#define TTBR_RGN_INNER_WRITE_THROUGH BIT0
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