Revision: 19163
http://sourceforge.net/p/edk2/code/19163
Author: abiesheuvel
Date: 2015-12-08 07:35:30 +0000 (Tue, 08 Dec 2015)
Log Message:
-----------
ArmPkg/PrePeiCore: adhere to architectural stack alignment requirement
Instead of using fuzzy arithmetic with a hardcoded stack alignment value
of 0x4, use the symbolic constant CPU_STACK_ALIGNMENT (which is at least
8 bytes, btw) to round the temporary stack base and size.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <[email protected]>
Reviewed-by: Leif Lindholm <[email protected]>
Modified Paths:
--------------
trunk/edk2/ArmPlatformPkg/PrePeiCore/MainMPCore.c
trunk/edk2/ArmPlatformPkg/PrePeiCore/MainUniCore.c
Modified: trunk/edk2/ArmPlatformPkg/PrePeiCore/MainMPCore.c
===================================================================
--- trunk/edk2/ArmPlatformPkg/PrePeiCore/MainMPCore.c 2015-12-08 05:26:26 UTC
(rev 19162)
+++ trunk/edk2/ArmPlatformPkg/PrePeiCore/MainMPCore.c 2015-12-08 07:35:30 UTC
(rev 19163)
@@ -130,14 +130,10 @@
// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi
Lists) is created at
// the base of the primary core stack
- PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
+ PpiListSize = ALIGN_VALUE(PpiListSize, CPU_STACK_ALIGNMENT);
TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) -
PpiListSize;
- // Make sure the size is 8-byte aligned. Once divided by 2, the size should
be 4-byte aligned
- // to ensure the stack pointer is 4-byte aligned.
- TemporaryRamSize = TemporaryRamSize - (TemporaryRamSize & (0x8-1));
-
//
// Bind this information into the SEC hand-off state
// Note: this must be in sync with the stuff in the asm file
@@ -149,8 +145,8 @@
SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on
the primary core (and so we use the first stack)
SecCoreData.TemporaryRamSize = TemporaryRamSize;
SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
- SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2;
- SecCoreData.StackBase = (VOID
*)ALIGN_VALUE((UINTN)(SecCoreData.TemporaryRamBase) +
SecCoreData.PeiTemporaryRamSize, 0x4);
+ SecCoreData.PeiTemporaryRamSize = ALIGN_VALUE
(SecCoreData.TemporaryRamSize / 2, CPU_STACK_ALIGNMENT);
+ SecCoreData.StackBase = SecCoreData.TemporaryRamBase +
SecCoreData.PeiTemporaryRamSize;
SecCoreData.StackSize = (TemporaryRamBase + TemporaryRamSize) -
(UINTN)SecCoreData.StackBase;
// Jump to PEI core entry point
Modified: trunk/edk2/ArmPlatformPkg/PrePeiCore/MainUniCore.c
===================================================================
--- trunk/edk2/ArmPlatformPkg/PrePeiCore/MainUniCore.c 2015-12-08 05:26:26 UTC
(rev 19162)
+++ trunk/edk2/ArmPlatformPkg/PrePeiCore/MainUniCore.c 2015-12-08 07:35:30 UTC
(rev 19163)
@@ -39,14 +39,10 @@
// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi
Lists) is created at
// the base of the primary core stack
- PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
+ PpiListSize = ALIGN_VALUE(PpiListSize, CPU_STACK_ALIGNMENT);
TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) -
PpiListSize;
- // Make sure the size is 8-byte aligned. Once divided by 2, the size should
be 4-byte aligned
- // to ensure the stack pointer is 4-byte aligned.
- TemporaryRamSize = TemporaryRamSize - (TemporaryRamSize & (0x8-1));
-
//
// Bind this information into the SEC hand-off state
// Note: this must be in sync with the stuff in the asm file
@@ -58,8 +54,8 @@
SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on
the primary core (and so we use the first stack)
SecCoreData.TemporaryRamSize = TemporaryRamSize;
SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
- SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2;
- SecCoreData.StackBase = (VOID
*)ALIGN_VALUE((UINTN)(SecCoreData.TemporaryRamBase) +
SecCoreData.PeiTemporaryRamSize, 0x4);
+ SecCoreData.PeiTemporaryRamSize = ALIGN_VALUE
(SecCoreData.TemporaryRamSize / 2, CPU_STACK_ALIGNMENT);
+ SecCoreData.StackBase = SecCoreData.TemporaryRamBase +
SecCoreData.PeiTemporaryRamSize;
SecCoreData.StackSize = (TemporaryRamBase + TemporaryRamSize) -
(UINTN)SecCoreData.StackBase;
// Jump to PEI core entry point
------------------------------------------------------------------------------
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