Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: b2d0e0c51a6ca426ec5e9748130489eb8208af96
https://github.com/tianocore/edk2/commit/b2d0e0c51a6ca426ec5e9748130489eb8208af96
Author: Evan Lloyd <[email protected]>
Date: 2016-02-03 (Wed, 03 Feb 2016)
Changed paths:
M ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
M ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S
M ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm
Log Message:
-----------
ArmPkg: Add isb when setting SCR
Some updates to SCR can cause a problem which manifests as an undefined opcode
exception.
This may be when a speculative secure instruction fetch happens after the NS
bit is set.
An isb is required to make the register change take effect fully.
Contributed-under: Tianocore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <[email protected]>
Reviewed-by: Sami Mujawar <[email protected]>
Reviewed-by: Ard Biesheuvel <[email protected]>
Reviewed-by: Leif Lindholm <[email protected]>
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