Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: 077af17ad029c326f755c1b44c158e9f75ba0064
https://github.com/tianocore/edk2/commit/077af17ad029c326f755c1b44c158e9f75ba0064
Author: Heyi Guo <heyi....@linaro.org>
Date: 2016-03-29 (Tue, 29 Mar 2016)
Changed paths:
M MdePkg/MdePkg.dec
Log Message:
-----------
MdePkg: Add PCD for UART default receive FIFO depth
PcdUartDefaultReceiveFifoDepth is added to indicate UART default
receive FIFO depth.
Type of UINT16 is enough for FIFO depth.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi....@linaro.org>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Liming Gao <liming....@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu...@intel.com>
Commit: f423d76021df725814a9bebcfeeb8cf57e3c8beb
https://github.com/tianocore/edk2/commit/f423d76021df725814a9bebcfeeb8cf57e3c8beb
Author: Heyi Guo <heyi....@linaro.org>
Date: 2016-03-29 (Tue, 29 Mar 2016)
Changed paths:
M MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
M MdeModulePkg/Universal/SerialDxe/SerialIo.c
Log Message:
-----------
MdeModulePkg/SerialDxe: Set FIFO depth with PCD
Set UART receive FIFO depth with PCD instead of fixed number "1".
The default value of PCD is also 1, so it makes no difference for
platforms which do not explicitly set this PCD.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi....@linaro.org>
Cc: Feng Tian <feng.t...@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu...@intel.com>
Compare: https://github.com/tianocore/edk2/compare/a5e5a2f581ee...f423d76021df------------------------------------------------------------------------------
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