Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: 87184487d2a1d46005a2076a73be3e6fb121afac
https://github.com/tianocore/edk2/commit/87184487d2a1d46005a2076a73be3e6fb121afac
Author: Ray Ni <ray...@intel.com>
Date: 2019-09-04 (Wed, 04 Sep 2019)
Changed paths:
M UefiCpuPkg/UefiCpuPkg.dec
Log Message:
-----------
UefiCpuPkg: Add PcdCpuSmmRestrictedMemoryAccess
The patch adds a new X64 only PCD PcdCpuSmmRestrictedMemoryAccess.
The PCD indicates access to non-SMRAM memory is restricted to
reserved, runtime and ACPI NVS type after SmmReadyToLock.
MMIO access is always allowed regardless of the value of this PCD.
Loose of such restriction is only required by RAS components in X64
platforms.
The PCD value is considered as constantly TRUE in IA32 platforms.
When the PCD value is TRUE, page table is initialized to cover all
memory spaces and the memory occupied by page table is protected by
page table itself as read-only.
Signed-off-by: Ray Ni <ray...@intel.com>
Reviewed-by: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen....@intel.com>
Reviewed-by: Laszlo Ersek <ler...@redhat.com>
Commit: 09f7c82b4c64956f58205dee7b661ab6c3253825
https://github.com/tianocore/edk2/commit/09f7c82b4c64956f58205dee7b661ab6c3253825
Author: Ray Ni <ray...@intel.com>
Date: 2019-09-04 (Wed, 04 Sep 2019)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
Log Message:
-----------
UefiCpuPkg/PiSmmCpu: Use new PCD PcdCpuSmmRestrictedMemoryAccess
The patch changes PiSmmCpu driver to consume PCD
PcdCpuSmmRestrictedMemoryAccess.
Because the behavior controlled by PcdCpuSmmStaticPageTable in
original code is not changed after switching to
PcdCpuSmmRestrictedMemoryAccess.
The functionality is not impacted by this patch.
Signed-off-by: Ray Ni <ray...@intel.com>
Reviewed-by: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen....@intel.com>
Reviewed-by: Laszlo Ersek <ler...@redhat.com>
Commit: 79186ddcddcabe48eceb58efd296252e3d53b003
https://github.com/tianocore/edk2/commit/79186ddcddcabe48eceb58efd296252e3d53b003
Author: Ray Ni <ray...@intel.com>
Date: 2019-09-04 (Wed, 04 Sep 2019)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
Log Message:
-----------
UefiCpuPkg/PiSmmCpu: Restrict access per PcdCpuSmmRestrictedMemoryAccess
Today's behavior is to always restrict access to non-SMRAM regardless
the value of PcdCpuSmmRestrictedMemoryAccess.
Because RAS components require to access all non-SMRAM memory, the
patch changes the code logic to honor PcdCpuSmmRestrictedMemoryAccess
so that only when the PCD is true, the restriction takes affect and
page table memory is also protected.
Because IA32 build doesn't reference this PCD, such restriction
always takes affect in IA32 build.
Signed-off-by: Ray Ni <ray...@intel.com>
Reviewed-by: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen....@intel.com>
Reviewed-by: Laszlo Ersek <ler...@redhat.com>
Commit: f64a597d45f9a10c378735baeeaed0c0c42da527
https://github.com/tianocore/edk2/commit/f64a597d45f9a10c378735baeeaed0c0c42da527
Author: Ray Ni <ray...@intel.com>
Date: 2019-09-04 (Wed, 04 Sep 2019)
Changed paths:
M UefiCpuPkg/UefiCpuPkg.dec
Log Message:
-----------
UefiCpuPkg: Explain relationship between several SMM PCDs
There are three PCDs that may impact the behavior of each other in
SMM environment:
PcdCpuSmmProfileEnable
PcdHeapGuardPropertyMask in MdeModulePkg
PcdCpuSmmRestrictedMemoryAccess
The patch updates the comments in DEC file to document it.
Signed-off-by: Ray Ni <ray...@intel.com>
Reviewed-by: Eric Dong <eric.d...@intel.com>
Cc: Jiewen Yao <jiewen....@intel.com>
Reviewed-by: Laszlo Ersek <ler...@redhat.com>
Compare: https://github.com/tianocore/edk2/compare/8b8e91584555...f64a597d45f9
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