Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: 1832eb15aa4e2660bd69e03897cf14f3704f74a0
https://github.com/tianocore/edk2/commit/1832eb15aa4e2660bd69e03897cf14f3704f74a0
Author: Cheng, Gao <gao.ch...@intel.com>
Date: 2021-12-08 (Wed, 08 Dec 2021)
Changed paths:
M UefiPayloadPkg/UefiPayloadPkg.fdf
Log Message:
-----------
UefiPayloadPkg/UefiPayloadPkg.fdf: Update DXE Apriori list
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3729
Put ReportStatusCodeRouterRuntimeDxe and StatusCodeHandlerRuntimeDxe in
DXE Apriori list to enable DEBUG() via serial port through
PeiDxeDebugLibReportStatusCode DebugLib instance as early as possible.
The earliest point to add them is right before BlSupportDxe.
Signed-off-by: Gao Cheng <gao.ch...@intel.com>
Reviewed-by: Guo Dong <guo.d...@intel.com>
Reviewed-by: Ray Ni <ray...@intel.com>
Cc: Maurice Ma <maurice...@intel.com>
Cc: Benjamin You <benjamin....@intel.com>
Commit: ca78281c2595a58dcb2e2cb20352914e2f6dafec
https://github.com/tianocore/edk2/commit/ca78281c2595a58dcb2e2cb20352914e2f6dafec
Author: Ni, Ray <ray...@intel.com>
Date: 2021-12-08 (Wed, 08 Dec 2021)
Changed paths:
M UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf
M UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.inf
M UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c
Log Message:
-----------
UefiPayloadPkg/PayloadEntry: Inherit 4/5-level paging from bootloader
The patch removes the dep on PcdUse5LevelPageTable.
Now the payload inherits the 5-level paging setting from
bootloader in IA-32e mode and uses 4-level paging in
legacy protected mode.
This fix the potential issue when bootloader enables 5-level paging
but 64bit payload sets 4-level page table to CR3 resulting CPU
exception because PcdUse5LevelPageTable is FALSE.
Signed-off-by: Ray Ni <ray...@intel.com>
Reviewed-by: Guo Dong <guo.d...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Reviewed-by: Maurice Ma <maurice...@intel.com>
Cc: Benjamin You <benjamin....@intel.com>
Commit: b2f7ee2dedb4def586969f7bfae6911b9f089a93
https://github.com/tianocore/edk2/commit/b2f7ee2dedb4def586969f7bfae6911b9f089a93
Author: Liu, Zhiguang <zhiguang....@intel.com>
Date: 2021-12-08 (Wed, 08 Dec 2021)
Changed paths:
M UefiPayloadPkg/UefiPayloadPkg.dec
Log Message:
-----------
UefiPayloadPkg: Increase SystemMemoryUefiRegionSize from 32M to 64M
Current, the SystemMemoryUefiRegionSize is 32M, which means in universal
payload entry, we can at most use 32M heap.
However, this can't meet the memory requirment for 5 level page table.
In UefiPayloadPkg\UefiPayloadEntry\X64\VirtualMemory.c, we assume the
Physical Address at most has 52 bits. Using 1G table support, with 52 bits
Physical Address, to build page table, we need one page to hold 16 PML5
entries, each PML5 entry points to one page containing 512 PML4 entries.
One PML4 entry points to one page containing 512 PML3 entries. Each PML3
entries will point to 1G memory space. Totally 8209 pages are needed,
which is around 32M bytes.
Therefore, increase SystemMemoryUefiRegionSize from 32M to 64M to support
5 level page tables.
Reviewed-by: Guo Dong <guo.d...@intel.com>
Reviewed-by: Ray Ni <ray...@intel.com>
Cc: Maurice Ma <maurice...@intel.com>
Cc: Benjamin You <benjamin....@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang....@intel.com>
Commit: 94e0a7bddb4021d21e55fe703b4ee41634f7c2b1
https://github.com/tianocore/edk2/commit/94e0a7bddb4021d21e55fe703b4ee41634f7c2b1
Author: Liu, Zhiguang <zhiguang....@intel.com>
Date: 2021-12-08 (Wed, 08 Dec 2021)
Changed paths:
M
UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoardInfo.inf
Log Message:
-----------
UefiPayloadPkg: Add missing Guid gUefiAcpiBoardInfoGuid
The library PciSegmentInfoLibAcpiBoardInfo consumes the Guid
gUefiAcpiBoardInfoGuid.
Reviewed-by: Guo Dong <guo.d...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Cc: Maurice Ma <maurice...@intel.com>
Cc: Benjamin You <benjamin....@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang....@intel.com>
Commit: 2527723de9a35c8d73ba09ae4dd1db3db81f22f2
https://github.com/tianocore/edk2/commit/2527723de9a35c8d73ba09ae4dd1db3db81f22f2
Author: Liu, Zhiguang <zhiguang....@intel.com>
Date: 2021-12-08 (Wed, 08 Dec 2021)
Changed paths:
M UefiPayloadPkg/UefiPayloadPkg.dsc
M UefiPayloadPkg/UefiPayloadPkg.fdf
Log Message:
-----------
UefiPayloadPkg: Add performance measurement feature
Add a Macro to enable performance measurement feature.
For any platform that uses UniversalPayload, we assume it supports
BaseCpuTimerLib and use it to align timerlib to get more accurate
performance result.
Reviewed-by: Guo Dong <guo.d...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Cc: Maurice Ma <maurice...@intel.com>
Cc: Benjamin You <benjamin....@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang....@intel.com>
Commit: ffdde9d7198982b880a9e333b2f2f48c2bbe958d
https://github.com/tianocore/edk2/commit/ffdde9d7198982b880a9e333b2f2f48c2bbe958d
Author: Jiang, Guomin <guomin.ji...@intel.com>
Date: 2021-12-08 (Wed, 08 Dec 2021)
Changed paths:
M UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c
Log Message:
-----------
UefiPayloadPkg: Skip ModuleInfo HOB in Payload
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3754
1. DxeCore will use ModuleInfo to install LoadedImage protocol for DxeCore.
2. DxeIpl will create the ModuleInfo of UniversalPayload. and
UniversalPayload will create the ModuleInfo of DxeCore.
3. UniversalPayload should skip the ModuleInfo from the DxeIpl to avoid
the mismatched ModuleInfo for DxeCore.
Changes:
1. Use function IsHobNeed to check if the HOB should be added
2. Add the ModuleInfo check logic in IsHobNeed function
Signed-off-by: Guomin Jiang <guomin.ji...@intel.com>
Cc: Guo Dong <guo.d...@intel.com>
Reviewed-by: Ray Ni <ray...@intel.com>
Cc: Maurice Ma <maurice...@intel.com>
Cc: Benjamin You <benjamin....@intel.com>
Commit: 965292135b9300937aed07f684c445161a64ca35
https://github.com/tianocore/edk2/commit/965292135b9300937aed07f684c445161a64ca35
Author: Feng, Ning <ning.f...@intel.com>
Date: 2021-12-08 (Wed, 08 Dec 2021)
Changed paths:
M UefiPayloadPkg/UefiPayloadPkg.dsc
Log Message:
-----------
UefiPayloadPkg/UefiPayloadPkg.dsc:Add BootManagerLib for BootManagerMenuApp
Add PlatformBootManagerLibconstructor for BootManagerMenuApp,
to get the value PcdBootManagefile overrided by platform side.
Signed-off-by: Ning Feng <ning.f...@intel.com>
Cc: Guo Dong <guo.d...@intel.com>
Reviewed-by: Ray Ni <ray...@intel.com>
Cc: Maurice Ma <maurice...@intel.com>
Cc: Benjamin You <benjamin....@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang....@intel.com>
Commit: 85a678bf76c5aac2e40255f48ea3209ff95f150a
https://github.com/tianocore/edk2/commit/85a678bf76c5aac2e40255f48ea3209ff95f150a
Author: Li, Aaron <aaron...@intel.com>
Date: 2021-12-08 (Wed, 08 Dec 2021)
Changed paths:
M UefiPayloadPkg/BuildAndIntegrationInstructions.txt
Log Message:
-----------
UefiPayloadPkg: Add integration instruction for coreboot common error
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3753
When integrate the latest UefiPayload with coreboot 4.14 or older, a
common error would occur like "E: Not a usable UEFI firmware volume."
The change adds an entry for how to solve this issue.
Cc: Guo Dong <guo.d...@intel.com>
Reviewed-by: Ray Ni <ray...@intel.com>
Signed-off-by: Aaron Li <aaron...@intel.com>
Compare: https://github.com/tianocore/edk2/compare/dc453b51640f...85a678bf76c5
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