Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: cb4820b6c148e62f9317799610b6e8dcd346c936
https://github.com/tianocore/edk2/commit/cb4820b6c148e62f9317799610b6e8dcd346c936
Author: Wu, Jiaxin <jiaxin...@intel.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
Log Message:
-----------
UefiCpuPkg/PiSmmCpuDxeSmm: Fix invalid InitializeMpSyncData call
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4338
No need call InitializeMpSyncData during normal boot SMI init,
because mSmmMpSyncData is NULL at that time. mSmmMpSyncData is
allocated in InitializeMpServiceData, which is invoked after
normal boot SMI init (SmmRelocateBases).
Cc: Eric Dong <eric.d...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Cc: Zeng Star <star.z...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Cc: Gerd Hoffmann <kra...@redhat.com>
Cc: Rahul Kumar <rahul1.ku...@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin...@intel.com>
Acked-by: Gerd Hoffmann <kra...@redhat.com>
Reviewed-by: Ray Ni <ray...@intel.com>
Commit: 85c6c14c4c78d4e1c657632eab1d17e5a9098d94
https://github.com/tianocore/edk2/commit/85c6c14c4c78d4e1c657632eab1d17e5a9098d94
Author: Wu, Jiaxin <jiaxin...@intel.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
Log Message:
-----------
UefiCpuPkg/PiSmmCpuDxeSmm: Replace mIsBsp by mBspApicId check
This patch is to replace mIsBsp by mBspApicId check.
mIsBsp becomes the local variable (IsBsp), then it can be
checked dynamically in the function. Instead, we define the
mBspApicId, which is to record the BSP ApicId used for
compare in SmmInitHandler. With this change, SmmInitHandler
can be run in parallel during SMM init.
Note:
This patch is the per-prepared work by refining the
SmmInitHandler, then, we can do the next step to
combine 2 SMIs (gcSmmInitTemplate & gcSmiHandlerTemplate)
into one (gcSmiHandlerTemplate), the new SMI handler
will call the SmmInitHandler in parallel to do the init.
Cc: Eric Dong <eric.d...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Cc: Zeng Star <star.z...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Cc: Gerd Hoffmann <kra...@redhat.com>
Cc: Rahul Kumar <rahul1.ku...@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin...@intel.com>
Reviewed-by: Ray Ni <ray...@intel.com>
Reviewed-by: Gerd Hoffmann <kra...@redhat.com>
Commit: 7b8c5a8eb42a404cad208e972f977ffacb1c8446
https://github.com/tianocore/edk2/commit/7b8c5a8eb42a404cad208e972f977ffacb1c8446
Author: Wu, Jiaxin <jiaxin...@intel.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
A UefiCpuPkg/Include/Guid/SmmBaseHob.h
M UefiCpuPkg/UefiCpuPkg.dec
Log Message:
-----------
UefiCpuPkg/SmmBaseHob.h: Add SMM Base HOB Data
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
The default SMBASE for the x86 processor is 0x30000. When
SMI happens, processor runs the SMI handler at SMBASE+0x8000.
Also, the SMM save state area is within SMBASE+0x10000.
One of the SMM initialization from processor perspective is to
relocate and program the new SMBASE (in TSEG range) for each
processor. When the SMBASE relocation happens in a PEI module,
the PEI module shall produce the SMM_BASE_HOB in HOB database
which tells the PiSmmCpuDxeSmm driver (runs at a later phase)
about the new SMBASE for each processor. PiSmmCpuDxeSmm driver
installs the SMI handler at the SMM_BASE_HOB.SmBase[Index]+0x8000
for processor Index. When the HOB doesn't exist, PiSmmCpuDxeSmm
driver shall relocate and program the new SMBASE itself.
This patch adds the SMM Base HOB for any PEI module to do
the SmBase relocation ahead of PiSmmCpuDxeSmm driver and
store the relocated SmBase address in array for each
processor.
Cc: Eric Dong <eric.d...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Cc: Zeng Star <star.z...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Cc: Gerd Hoffmann <kra...@redhat.com>
Cc: Rahul Kumar <rahul1.ku...@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin...@intel.com>
Acked-by: Gerd Hoffmann <kra...@redhat.com>
Reviewed-by: Ray Ni <ray...@intel.com>
Commit: ec07fd0e35d90dbcc36be300a9ceeac29c5de2ad
https://github.com/tianocore/edk2/commit/ec07fd0e35d90dbcc36be300a9ceeac29c5de2ad
Author: Wu, Jiaxin <jiaxin...@intel.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
M UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
Log Message:
-----------
UefiCpuPkg/PiSmmCpuDxeSmm: Consume SMM Base Hob for SmBase info
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
Existing SMBASE Relocation is in the PiSmmCpuDxeSmm driver, which
will relocate the SMBASE of each processor by setting the SMBASE
field in the saved state map (at offset 7EF8h) to a new value.
The RSM instruction reloads the internal SMBASE register with the
value in SMBASE field when each time it exits SMM. All subsequent
SMI requests will use the new SMBASE to find the starting address
for the SMI handler (at SMBASE + 8000h).
Due to the default SMBASE for all x86 processors is 0x30000, the
APs' 1st SMI for rebase has to be executed one by one to avoid
the processors over-writing each other's SMM Save State Area (see
existing SmmRelocateBases() function), which means the next AP has
to wait for the previous AP to finish its 1st SMI, then it can call
into its 1st SMI for rebase via Smi Ipi command, thus leading the
existing SMBASE Relocation has to be running in series. Besides, it
needs very complex code to handle the AP exit semaphore
(mRebased[Index]), which will hook return address of SMM Save State
so that semaphore code can be executed immediately after AP exits
SMM for SMBASE relocation (see existing SemaphoreHook() function).
With SMM Base Hob support, PiSmmCpuDxeSmm does not need the RSM
instruction to do the SMBASE Relocation. SMBASE Register for each
processors have already been programmed and all SMBASE address have
recorded in SMM Base Hob. So the same default SMBASE Address
(0x30000) will not be used, thus the processors over-writing each
other's SMM Save State Area will not happen in PiSmmCpuDxeSmm driver.
This way makes the first SMI init can be executed in parallel and
save boot time on multi-core system. Besides, Semaphore Hook code
logic is also not required, which will greatly simplify the SMBASE
Relocation flow.
Mainly changes as below:
* Assume the biggest possibility of tile size is 8k.
* Combine 2 SMIs (gcSmmInitTemplate & gcSmiHandlerTemplate) into one
(gcSmiHandlerTemplate), the new SMI handler needs to run to 2 paths:
one to SmmCpuFeaturesInitializeProcessor(), the other to SMM Core
Entry Point.
* Issue SMI IPI (All Excluding Self SMM IPI + BSP SMM IPI) for first
SMI init before normal SMI sources happen.
* Call SmmCpuFeaturesInitializeProcessor() in parallel.
Cc: Eric Dong <eric.d...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Cc: Zeng Star <star.z...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Acked-by: Gerd Hoffmann <kra...@redhat.com>
Cc: Rahul Kumar <rahul1.ku...@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin...@intel.com>
Reviewed-by: Ray Ni <ray...@intel.com>
Commit: f6b86eec5aeb44b205d44312c99f420a96ada43f
https://github.com/tianocore/edk2/commit/f6b86eec5aeb44b205d44312c99f420a96ada43f
Author: Wu, Jiaxin <jiaxin...@intel.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M UefiCpuPkg/Library/SmmCpuFeaturesLib/CpuFeaturesLib.h
M UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c
M UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
M UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf
M UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
M UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf
Log Message:
-----------
UefiCpuPkg/SmmCpuFeaturesLib: Skip SMBASE configuration
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
This patch is to avoid configure SMBASE if SmBase relocation has been
done. If gSmmBaseHobGuid found, means SmBase info has been relocated
and recorded in the SmBase array. No need to do the relocation in
SmmCpuFeaturesInitializeProcessor().
Cc: Eric Dong <eric.d...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Cc: Zeng Star <star.z...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Acked-by: Gerd Hoffmann <kra...@redhat.com>
Cc: Rahul Kumar <rahul1.ku...@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin...@intel.com>
Reviewed-by: Ray Ni <ray...@intel.com>
Commit: a1d595fc9c049874b972a371fe6090738a176f5b
https://github.com/tianocore/edk2/commit/a1d595fc9c049874b972a371fe6090738a176f5b
Author: Wu, Jiaxin <jiaxin...@intel.com>
Date: 2023-03-06 (Mon, 06 Mar 2023)
Changed paths:
M OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
M OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
Log Message:
-----------
OvmfPkg/SmmCpuFeaturesLib: Check SmBase relocation supported or not
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
This patch is to check SmBase relocation supported or not.
If gSmmBaseHobGuid found, means SmBase info has been relocated
and recorded in the SmBase array. ASSERT it's not supported in OVMF.
Cc: Eric Dong <eric.d...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Cc: Zeng Star <star.z...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Cc: Gerd Hoffmann <kra...@redhat.com>
Cc: Rahul Kumar <rahul1.ku...@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin...@intel.com>
Reviewed-by: Gerd Hoffmann <kra...@redhat.com>
Reviewed-by: Ray Ni <ray...@intel.com>
Compare: https://github.com/tianocore/edk2/compare/5a0932b7d480...a1d595fc9c04
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