Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: 7fa469263638d150185a17ff3f07f9bcf63f0378
https://github.com/tianocore/edk2/commit/7fa469263638d150185a17ff3f07f9bcf63f0378
Author: Andrei Warkentin <andrei.warken...@intel.com>
Date: 2023-03-08 (Wed, 08 Mar 2023)
Changed paths:
M OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
M OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf
Log Message:
-----------
OvmfPkg: RiscVVirt: add SATA support
Tested with a PCIe pass-thru'd AHCI controller.
Cc: Sunil V L <suni...@ventanamicro.com>
Cc: Jiewen Yao <jiewen....@intel.com>
Cc: Ard Biesheuvel <ardb+tianoc...@kernel.org>
Signed-off-by: Andrei Warkentin <andrei.warken...@intel.com>
Commit: dc5880d02f6507419c0381bb4e90fdafb4aaf751
https://github.com/tianocore/edk2/commit/dc5880d02f6507419c0381bb4e90fdafb4aaf751
Author: Andrei Warkentin <andrei.warken...@intel.com>
Date: 2023-03-08 (Wed, 08 Mar 2023)
Changed paths:
M MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c
Log Message:
-----------
MdePkg: BasePeCoffLib: Allow AArch64 and x64 images in ImageFormatSupported
ARM64 and X64 may allow such foreign images to be used when
driver implementing EDKII_PECOFF_IMAGE_EMULATOR_PROTOCOL is
present.
Cc: Sunil V L <suni...@ventanamicro.com>
Cc: Daniel Schaefer <g...@danielschaefer.me>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Liming Gao <gaolim...@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang....@intel.com>
Signed-off-by: Andrei Warkentin <andrei.warken...@intel.com>
Commit: 5bd2e5dfe6f8efa2cbbf643e4e7e46867a8a26b0
https://github.com/tianocore/edk2/commit/5bd2e5dfe6f8efa2cbbf643e4e7e46867a8a26b0
Author: Andrei Warkentin <andrei.warken...@intel.com>
Date: 2023-03-08 (Wed, 08 Mar 2023)
Changed paths:
M MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c
Log Message:
-----------
MdePkg: BaseLib: don't log in RISCV InternalSwitchStack
InternalSwitchStack may be called with a TPL high
enough for a DebugLib implementation to assert.
Other arch implementations don't log either.
Cc: Daniel Schaefer <g...@danielschaefer.me>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Liming Gao <gaolim...@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang....@intel.com>
Reviewed-by: Sunil V L <suni...@ventanamicro.com>
Signed-off-by: Andrei Warkentin <andrei.warken...@intel.com>
Commit: 6ceaef4804c52f0190fe9c09ff89cb19affbd56f
https://github.com/tianocore/edk2/commit/6ceaef4804c52f0190fe9c09ff89cb19affbd56f
Author: Andrei Warkentin <andrei.warken...@intel.com>
Date: 2023-03-08 (Wed, 08 Mar 2023)
Changed paths:
M MdePkg/Library/BaseCpuLib/RiscV/Cpu.S
Log Message:
-----------
MdePkg: BaseCpuLib: Fix RISCV CpuSleep symbol name.
CpuSleep, not _CpuSleep.
Cc: Daniel Schaefer <g...@danielschaefer.me>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Liming Gao <gaolim...@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang....@intel.com>
Reviewed-by: Sunil V L <suni...@ventanamicro.com>
Signed-off-by: Andrei Warkentin <andrei.warken...@intel.com>
Commit: db0a3087a535f54f3697e0d658a53bb78d57ce70
https://github.com/tianocore/edk2/commit/db0a3087a535f54f3697e0d658a53bb78d57ce70
Author: Andrei Warkentin <andrei.warken...@intel.com>
Date: 2023-03-08 (Wed, 08 Mar 2023)
Changed paths:
M MdeModulePkg/Core/Dxe/Image/Image.c
Log Message:
-----------
MdeModulePkg: Dxe: add RISCV64 to mMachineTypeInfo
This fixes messages like:
"Image type AARCH64 can't be loaded on <Unknown> UEFI system"
Cc: Daniel Schaefer <g...@danielschaefer.me>
Cc: Liming Gao <gaolim...@byosoft.com.cn>
Cc: Jian J Wang <jian.j.w...@intel.com>
Reviewed-by: Sunil V L <suni...@ventanamicro.com>
Signed-off-by: Andrei Warkentin <andrei.warken...@intel.com>
Commit: 5ad2592ab370b6c9030d1239940046bdeec9c2c6
https://github.com/tianocore/edk2/commit/5ad2592ab370b6c9030d1239940046bdeec9c2c6
Author: Andrei Warkentin <andrei.warken...@intel.com>
Date: 2023-03-08 (Wed, 08 Mar 2023)
Changed paths:
M UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c
Log Message:
-----------
UefiCpuPkg: CpuTimerDxeRiscV64: fix tick duration accounting
The TimerDxe implementation doesn't account for the physical
time passed due to timer handler execution or (perhaps even
more importantly) time spent with interrupts masked.
Other implementations (e.g. like the Arm one) do. If the
timer tick is always incremented at a fixed rate, then
you can slow down UEFI's perception of time by running
long sections of code in a critical section.
Cc: Daniel Schaefer <g...@danielschaefer.me>
Reviewed-by: Sunil V L <suni...@ventanamicro.com>
Signed-off-by: Andrei Warkentin <andrei.warken...@intel.com>
Commit: 69da506c927f8092ea8f783a092a694a3582e3ef
https://github.com/tianocore/edk2/commit/69da506c927f8092ea8f783a092a694a3582e3ef
Author: Andrei Warkentin <andrei.warken...@intel.com>
Date: 2023-03-08 (Wed, 08 Mar 2023)
Changed paths:
M MdePkg/Include/Protocol/DebugSupport.h
M UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c
M
UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHandlerLib.c
M
UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHandlerLib.h
M
UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/SupervisorTrapHandler.S
Log Message:
-----------
UefiCpuPkg: BaseRiscV64CpuExceptionHandlerLib: clean up
RegisterCpuInterruptHandler did not allow setting
exception handlers for anything beyond the timer IRQ.
Beyond that, it didn't meet the spec around handling
of inputs.
RiscVSupervisorModeTrapHandler now will invoke
set handlers for both exceptions and interrupts.
Two arrays of handlers are maintained - one for exceptions
and one for interrupts.
For unhandled traps, RiscVSupervisorModeTrapHandler dumps
state using the now implemented DumpCpuContext.
For EFI_SYSTEM_CONTEXT_RISCV64, extend this with the trapped
PC address (SEPC), just like on AArch64 (ELR). This is
necessary for X86EmulatorPkg to work as it allows a trap
handler to return execution to a different place. Add
SSTATUS/STVAL as well, at least for debugging purposes. There
is no value in hiding this.
Fix nested exception handling. Handler code should not
be saving SIE (the value is saved in SSTATUS.SPIE) or
directly restored (that's done by SRET). Save and
restore the entire SSTATUS and STVAL, too.
Cc: Daniel Schaefer <g...@danielschaefer.me>
Reviewed-by: Sunil V L <suni...@ventanamicro.com>
Signed-off-by: Andrei Warkentin <andrei.warken...@intel.com>
Compare: https://github.com/tianocore/edk2/compare/75fb0cfc8237...69da506c927f
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