Branch: refs/heads/master
  Home:   https://github.com/tianocore/edk2
  Commit: 4efcd654ecd94b91bd45da79583f114a0fa12a87
      
https://github.com/tianocore/edk2/commit/4efcd654ecd94b91bd45da79583f114a0fa12a87
  Author: Yanbo Huang <yanbo.hu...@intel.com>
  Date:   2024-07-05 (Fri, 05 Jul 2024)

  Changed paths:
    M UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
    M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
    M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
    M UefiCpuPkg/PiSmmCpuDxeSmm/SyncTimer.c

  Log Message:
  -----------
  Revert "UefiCpuPkg/PiSmmCpuDxeSmm: Consume PcdCpuSmmApSyncTimeout2"

This reverts commit cb3134612d11102fe066c94c8fa7edb20d62c1a8.
Intel server platform sync this commit will hit conflict since our code base is 
old.
We don't want to cherry-pick the dependent patches to avoid potential issue.
We need to revert this commit first and then fix the conflict and reapply the 
change.
Sorry for the incovenience.

Signed-off-by: Yanbo Huang <yanbo.hu...@intel.com>


  Commit: f8bf46be599a957d9374b513f730243725637127
      
https://github.com/tianocore/edk2/commit/f8bf46be599a957d9374b513f730243725637127
  Author: Yanbo Huang <yanbo.hu...@intel.com>
  Date:   2024-07-05 (Fri, 05 Jul 2024)

  Changed paths:
    M UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
    M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
    M UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
    M UefiCpuPkg/PiSmmCpuDxeSmm/SyncTimer.c

  Log Message:
  -----------
  UefiCpuPkg/PiSmmCpuDxeSmm: Consume PcdCpuSmmApSyncTimeout2

This patch is to consume the PcdCpuSmmApSyncTimeout2 to
enhance the flexibility of timeout configuration.
In some cases, certain processors may not be able to enter
SMI, and prolonged waiting could lead to kernel soft/hard
lockup. We have now defined two timeouts. The first timeout
can be set to a smaller value to reduce the waiting period.
Processors that are unable to enter SMI will be woken up
through SMIIPL to enter SMI, followed by a second waiting
period. The second timeout can be set to a larger value to
prevent delays in processors entering SMI case due to the
long instruction execution.

This patch adjust the location of PcdCpuSmmApSyncTimeout2
to avoid conflict.

Signed-off-by: Yanbo Huang <yanbo.hu...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Cc: Rahul Kumar <rahul1.ku...@intel.com>
Cc: Gerd Hoffmann <kra...@redhat.com>


Compare: https://github.com/tianocore/edk2/compare/a3359ffb25ce...f8bf46be599a

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