Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: 47bb9f9a97726d11a11a5658a3917045bd9b0787
https://github.com/tianocore/edk2/commit/47bb9f9a97726d11a11a5658a3917045bd9b0787
Author: Dun Tan <dun....@intel.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
Log Message:
-----------
UefiCpuPkg: Revert "UefiCpuPkg/PiSmmCpuDxeSmm: Fix system..."
This reverts commit bef0d333dc "UefiCpuPkg/PiSmmCpuDxeSmm:
Fix system hang when SmmProfile enable".
The commit bef0d333dc was added to modify the code logic in
InitPaging() to fix a code assert issue. Previously, the root
cause of this issue is that we try to only set NX attribute
for not-present MMIO range above 4G when SMM profile feature
is enabled, which is not allowed by CpuPageTableLib.
But after we always create full mapping initial SMM page
table in the next commit, this code assert issue won't happen
anymore since MMIO range above 4g will also be present in SMM
page table before InitPaging().
Meanwhile another issue was introduced by commit bef0d333dc:
In the entrypoint of PiSmmCpuDxe driver, we will set some
pages in stack range as not-present in SMM page table if
PcdCpuSmmStackGuard or PcdControlFlowEnforcementPropertyMask
is TRUE. But in commit bef0d333dc, all SMRAM range are set
to present in InitPaging() if SMM profile is enabled. Then
the stack guard and shadow stack features do not work anymore.
So let's revert the commit "UefiCpuPkg/PiSmmCpuDxeSmm: Fix
system hang when SmmProfile enable"
Signed-off-by: Dun Tan <dun....@intel.com>
Commit: 9f29fbd33b73dafb7fca430d08e68b6b8f4bbb9d
https://github.com/tianocore/edk2/commit/9f29fbd33b73dafb7fca430d08e68b6b8f4bbb9d
Author: Dun Tan <dun....@intel.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
Log Message:
-----------
UefiCpuPkg: always create full mapping SMM page table
In this commit, we always create full mapping SMM page
table in SmmInitPageTable regardless the value of the
PcdCpuSmmRestrictedMemoryAccess.
Previously, when PcdCpuSmmRestrictedMemoryAccess is false,
only [0, 4G] is mapped in smm page table in SmmInitPageTable.
If the range above 4G is accessed in SMM, SmiPFHandler will
create new paging entry for the accessed range. To simplify
the code logic, we also create full mapping SMM page table
in SmmInitPageTable when PcdCpuSmmRestrictedMemoryAccess is
false. Then we don't need to dynamic create paging entry for
range above 4G except SMM profile is enabled.
The comparison of SMM page table before and after the change
under different configuration are listed here:
1.PcdCpuSmmRestrictedMemoryAccess is TRUE
No change
2.PcdCpuSmmRestrictedMemoryAccess is FALSE and
PcdCpuSmmProfileEnable is TRUE
Before: the SMM page table when ReadyToLock covers
1. SMRAM range 2.SMM profile range
3. MMIO range below 4G
After: the SMM page table when ReadyToLock covers
1. SMRAM range 2.SMM profile range
3. MMIO range below 4G and above 4G
3.PcdCpuSmmRestrictedMemoryAccess is FALSE and
PcdCpuSmmProfileEnable is FALSE
Before: the SMM page table when ReadyToLock covers
[0, 4G]
After: the SMM page table when ReadyToLock covers
[0, MaxSupportPhysicalAddress]
Signed-off-by: Dun Tan <dun....@intel.com>
Commit: b3631ca944bda812f51db3f833f18d82d8e0e761
https://github.com/tianocore/edk2/commit/b3631ca944bda812f51db3f833f18d82d8e0e761
Author: Dun Tan <dun....@intel.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
Log Message:
-----------
UefiCpuPkg: remove unnecessary manipulation for smm page table
In this commit, we only set some special bits in paging entry
content when SMM profile is enabled.
Previously, we set Pml4Entry sub-entries number and set the
IA32_PG_PMNT bit for first 4 PdptEntry. It's to make sure that
the paging structures cover [0, 4G] won't be reclaimed during
dynamic page table creation.
In last commit, we always create full mapping SMM page table
regardless PcdCpuSmmRestrictedMemoryAccess. With this change,
we only need to dynamic create SMM page table in smm PF handler
when PcdCpuSmmProfileEnable is TRUE.
So the sub-entries number and IA32_PG_PMNT bit in paging entry
is only needed to set when PcdCpuSmmProfileEnable is TRUE.
Signed-off-by: Dun Tan <dun....@intel.com>
Commit: b5c9bbff8e9c2613dc72ab4dde6d4ddc1e1217bd
https://github.com/tianocore/edk2/commit/b5c9bbff8e9c2613dc72ab4dde6d4ddc1e1217bd
Author: Dun Tan <dun....@intel.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
Log Message:
-----------
UefiCpuPkg:CpuDeadLoop in SmiPFHandler if SMM profile is disabled
Always call CpuDeadLoop() in SmiPFHandler if SMM
profile is disabled.
Previously, when PcdCpuSmmRestrictedMemoryAccess is
FALSE, SMM page table only covers [0, 4g]. When code
access to range above 4g happens, SmiPFHandler will map
the accessed not-present range to present. After we
always create full mapping page table, the dynamic page
table creation logic is only needed when SMM profile is
enabled. So we use CpuDeadLoop() in SmiPFHandler to cover
the all the PF exception when SMM profile is disabled
Considering that [0, 4g] is always mapped in SMM page
table, we also modify the IA32 SmiPFHandler code to be
aligned with X64 code.
Signed-off-by: Dun Tan <dun....@intel.com>
Commit: cae90a83907d5f9e10c45cd2985bab1fafc47f56
https://github.com/tianocore/edk2/commit/cae90a83907d5f9e10c45cd2985bab1fafc47f56
Author: Dun Tan <dun....@intel.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
Log Message:
-----------
UefiCpuPkg: Remove duplicate code in SmiPfHandler
In this commit, we remove duplicate CpuDeadLoop in
SmiPfHandler where mCpuSmmRestrictedMemoryAccess is
TRUE.
With last commit, we always call CpuDeadLoop if SMM
profile is disabled. Then the CpuDeadLoop calling
for the condition (mCpuSmmRestrictedMemoryAccess &&
IsSmmCommBufferForbiddenAddress (PFAddress)) is not
needed anymore. We also modify the IA32 related code
to be aligned with X64.
Signed-off-by: Dun Tan <dun....@intel.com>
Commit: 8b8ac5d986dd78ee729a3fd32c833ff2235feeb9
https://github.com/tianocore/edk2/commit/8b8ac5d986dd78ee729a3fd32c833ff2235feeb9
Author: Dun Tan <dun....@intel.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
M UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.h
Log Message:
-----------
UefiCpuPkg: rename the SmiDefaultPFHandler function
Rename SmiDefaultPFHandler to SmiProfileMapPFAddress
and move the implementation to SmmProfileArch.c since
it only will be used when SMM profile is enabled.
Signed-off-by: Dun Tan <dun....@intel.com>
Commit: cff06413604a980bd3f04782c4a745f7c02ccd7b
https://github.com/tianocore/edk2/commit/cff06413604a980bd3f04782c4a745f7c02ccd7b
Author: Dun Tan <dun....@intel.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
Log Message:
-----------
UefiCpuPkg: remove unneeded code in SmmProfilePFHandler
Remove unneeded calling of SmmProfileMapPFAddress () in
SmmProfileMapPFAddress if SMM profile is not started.
Previously, before SMM profile is started at ReadyToLock,
SMM page table only covers [0, 4G]. The access to the range
above 4G will cause PF. SmmProfileMapPFAddress is needed
here to map the PF address before SMM profile is started.
Now we always create full mapping SMM page table in the
SmmInitPageTable(). When SMM profile is enabled, before
SMM profile is started at ReadyToLock, SMM page table
covers [0, MaxSupportedPhysicalAddress]. So the case that
access to the range above 4G causes PF won't happen
anymore.
Then we can remove the calling of SmmProfileMapPFAddress
before SMM profile is started.
Signed-off-by: Dun Tan <dun....@intel.com>
Commit: 5d43165ff8596c2fa07b7d4de3c482d64338ca99
https://github.com/tianocore/edk2/commit/5d43165ff8596c2fa07b7d4de3c482d64338ca99
Author: Dun Tan <dun....@intel.com>
Date: 2024-08-05 (Mon, 05 Aug 2024)
Changed paths:
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
M UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h
M UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c
Log Message:
-----------
UefiCpuPkg: rename and simplify IsAddressValid function
In this commit, we rename IsAddressValid function to
IsSmmProfilePFAddressAbove4GValid and remove unneeded
code logic in it.
Currently, IsAddressValid is only used in the function
RestorePageTableAbove4G. It's used to identify if a SMM
profile PF address above 4G is inside mProtectionMemRange
or not. So we can remove the PcdCpuSmmProfileEnable FALSE
condition related code logic in it. Also the function name
is change to be more detailed and specific.
Signed-off-by: Dun Tan <dun....@intel.com>
Compare: https://github.com/tianocore/edk2/compare/68b4c4b481f3...5d43165ff859
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