Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: 6f07aeb49c2d94e460cbd3f36b8cfa81355c825f
https://github.com/tianocore/edk2/commit/6f07aeb49c2d94e460cbd3f36b8cfa81355c825f
Author: Jessica Clarke <jrt...@jrtc27.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M ArmPlatformPkg/Sec/AArch64/Helper.S
Log Message:
-----------
ArmPlatformPkg: Document that we don't support HCR_EL2.E2H being set
The existing code here predates its existence as it's assuming that
CPTR_EL2 has the traditional layout rather than being like CPACR_EL1
(likely also true elsewhere for other registers), and the UEFI spec has
nothing to say on the matter. One assumes the intent is that if you're
in EL2 you're in EL2 proper, and it would be very strange to enter EDK2
with E2H set. Document this existing assumption.
Signed-off-by: Jessica Clarke <jrt...@jrtc27.com>
Commit: ef35863880ab7728e69c690603afb77182cb14ea
https://github.com/tianocore/edk2/commit/ef35863880ab7728e69c690603afb77182cb14ea
Author: Jessica Clarke <jrt...@jrtc27.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M ArmPlatformPkg/Sec/AArch64/Helper.S
M MdePkg/Include/AArch64/AArch64.h
Log Message:
-----------
ArmPlatformPkg,MdePkg: Rename AARCH64 CPACR_CP_FULL_ACCESS
CP_FULL_ACCESS is a misnomer, we only enable access to SIMD/FP state,
and although the register's mnemonic is CPACR_EL1, its full name is
"Architectural Feature Access Control Register", with AArch64 having no
coprocessors like AArch32 did, so the "CP" is also not appropriate.
Rename it to show it's the default value we use on entry, and define it
in terms of the existing CPACR_FPEN_FULL rather than a magic constant
with the same value to more clearly document that fact. Also update
comments to reflect all this (including the CPTR_EL2 case).
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Jessica Clarke <jrt...@jrtc27.com>
Commit: 1bd09ad1936c51fcbfbec2ed4df59a2fbc182a62
https://github.com/tianocore/edk2/commit/1bd09ad1936c51fcbfbec2ed4df59a2fbc182a62
Author: Jessica Clarke <jrt...@jrtc27.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M MdePkg/Include/AArch64/AArch64.h
Log Message:
-----------
MdePkg: Define AARCH64_CPTR_RES1 and AARCH64_CPTR_DEFAULT
These constants give the set of RES1 bits in CPTR_EL2, as 1s, and the
default value to use for CPTR_EL2 in order to enable all known (or
harmless) features but no unknown ones that require EL2 knowledge. This
will be used by ArmPlatformPkg in the following commit, separated due to
being different packages, even though the combined change is tiny.
Signed-off-by: Jessica Clarke <jrt...@jrtc27.com>
Commit: cb87aada970c68c1a210ed68a4a1ce238623e3c3
https://github.com/tianocore/edk2/commit/cb87aada970c68c1a210ed68a4a1ce238623e3c3
Author: Jessica Clarke <jrt...@jrtc27.com>
Date: 2024-11-14 (Thu, 14 Nov 2024)
Changed paths:
M ArmPlatformPkg/Sec/AArch64/Helper.S
Log Message:
-----------
ArmPlatformPkg: Honour RES1 fields in CPTR_EL2
Unlike CPACR_EL1 whose reserved bits are solely RES0, CPTR_EL2 has some
RES1 bits, and so we should not clear them unless we know what they
mean. For example, when SVE was introduced, CPACR_EL1.ZEN occupied a
RES0 field and thus 0 means trap (which is what we get at EL1), but
CPTR_EL2.TZ occupied a RES1 field and thus 1 means trap, but we set it
to 0, so the environment is inconsistent between EDK2 and EL1 and EL2.
Another concrete case is for Morello, where the CEN/TC fields similarly
gate access to capability register state, but also alter exception
delivery and return, such that VBAR_ELx and ELR_ELx become capabilities.
So long as software adheres to RES0/1 this is backwards-compatible, but
since EDK2 does not do so here it inadvertently enables capability-based
exception delivery and return and thus, when run at EL2, gets stuck in a
trap loop when taking its first interrupt, but works just fine at EL1.
Fix this by setting all the RES1 fields in CPTR_EL2, following the
pattern for CPACR_EL1's non-zero initial value (due to setting FPEN so
as to not trap on SIMD/FP use), tested by running ArmVirtQemu-AARCH64
(DEBUG) on Morello QEMU with EL2 enabled.
Signed-off-by: Jessica Clarke <jrt...@jrtc27.com>
Compare: https://github.com/tianocore/edk2/compare/3299c36ba181...cb87aada970c
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