Branch: refs/heads/master
Home: https://github.com/tianocore/edk2
Commit: db299fa7882e6f46d87a51ee31d02c70f96e115d
https://github.com/tianocore/edk2/commit/db299fa7882e6f46d87a51ee31d02c70f96e115d
Author: Tuan Phan <tp...@ventanamicro.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
R
UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf
R
UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.uni
R
UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHandlerLib.c
R
UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/CpuExceptionHandlerLib.h
R
UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/SupervisorTrapHandler.S
M UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
A UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV/ExceptionHandler.h
A UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV/ExceptionHandlerAsm.S
A UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV/ExceptionLib.c
M UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
M UefiCpuPkg/UefiCpuPkg.ci.yaml
M UefiCpuPkg/UefiCpuPkg.dsc
Log Message:
-----------
UefiCpuPkg: CpuExceptionHandlerLib: Support RISC-V
Relocate exception handler code from BaseRiscV64CpuExceptionHandlerLib to
CpuExceptionHandlerLib.
Signed-off-by: Tuan Phan <tp...@ventanamicro.com>
Commit: 3a06b5dac989573c4d2a568ec7b961ebadb12f86
https://github.com/tianocore/edk2/commit/3a06b5dac989573c4d2a568ec7b961ebadb12f86
Author: Tuan Phan <tp...@ventanamicro.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M OvmfPkg/RiscVVirt/Library/PlatformSecLib/SecEntry.S
Log Message:
-----------
OvmfPkg/RiscVVirt/PlatformSecLib: Clear s0 (fp) at entry point
Scrub s0 (fp) to prevent stack tracing from extending beyond the Sec code.
Signed-off-by: Andrei Warkentin <andrei.warken...@intel.com>
Commit: aee4d29d56ddeafc34f9e9144ec3028bd749ec96
https://github.com/tianocore/edk2/commit/aee4d29d56ddeafc34f9e9144ec3028bd749ec96
Author: Tuan Phan <tp...@ventanamicro.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M BaseTools/Conf/tools_def.template
Log Message:
-----------
BaseTools/tools_def: Enable frame pointer for RISC-V
Add -fno-omit-frame-pointer to RISC-V targets to ensure frame pointers
are preserved, supporting stack backtraces for debugging.
Signed-off-by: Tuan Phan <tp...@ventanamicro.com>
Commit: 4052e8f15589bba9b386ed0fa6082f377074cb84
https://github.com/tianocore/edk2/commit/4052e8f15589bba9b386ed0fa6082f377074cb84
Author: Tuan Phan <tp...@ventanamicro.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
A UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV/Backtrace.c
A UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV/Backtrace.h
A UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV/BacktraceHelper.c
A UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV/BacktraceHelperSec.c
M UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV/ExceptionLib.c
M UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
Log Message:
-----------
UefiCpuPkg: CpuExceptionHandlerLib: RISC-V: Support backtrace
Add support for backtrace in DEBUG builds for RISC-V.
Signed-off-by: Tuan Phan <tp...@ventanamicro.com>
Commit: 04fe3f50d63c0427fb7c4e6a45b48f487e985c5a
https://github.com/tianocore/edk2/commit/04fe3f50d63c0427fb7c4e6a45b48f487e985c5a
Author: Tuan Phan <tp...@ventanamicro.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
Log Message:
-----------
OvmfPkg/RiscVVirt: Adopt New CpuExceptionHandlerLib
Utilize the updated CpuExceptionHandlerLib, which now includes
RISC-V support.
Signed-off-by: Tuan Phan <tp...@ventanamicro.com>
Compare: https://github.com/tianocore/edk2/compare/c840e5f95b0f...04fe3f50d63c
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