The code has a simple bug on calculating aligned page table address. We need to add alignment - 1 to allocated address first and then mask the unaligned bits.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo <[email protected]> Cc: Leif Lindholm <[email protected]> Cc: Ard Biesheuvel <[email protected]> --- ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c index 3d58d5d..4db4bbe 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c @@ -381,7 +381,7 @@ GetBlockEntryListFromAddress ( if (TranslationTable == NULL) { return NULL; } - TranslationTable = (UINT64*)((UINTN)TranslationTable & TT_ADDRESS_MASK_DESCRIPTION_TABLE); + TranslationTable = (UINT64*)(((UINTN)TranslationTable + TT_ALIGNMENT_DESCRIPTION_TABLE - 1) & TT_ADDRESS_MASK_DESCRIPTION_TABLE); // Populate the newly created lower level table SubTableBlockEntry = TranslationTable; @@ -409,7 +409,7 @@ GetBlockEntryListFromAddress ( if (TranslationTable == NULL) { return NULL; } - TranslationTable = (UINT64*)((UINTN)TranslationTable & TT_ADDRESS_MASK_DESCRIPTION_TABLE); + TranslationTable = (UINT64*)(((UINTN)TranslationTable + TT_ALIGNMENT_DESCRIPTION_TABLE - 1) & TT_ADDRESS_MASK_DESCRIPTION_TABLE); ZeroMem (TranslationTable, TT_ENTRY_COUNT * sizeof(UINT64)); -- 2.5.0 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
