There is a special case in the ElfConvert code where ARM's .data is not aligned to section alignment, presumably to preserve the relative offset between .text and .data in the presence of relative relocations that are not recomputed at PE/COFF conversion time.
This violates the PE/COFF spec, so it is better to actively check whether the relative section offsets have been preserved during PE/COFF conversion instead of assuming things will still line up if we just don't align .data, especially now that we set the PE/COFF section alignment based on the alignment requirements of the ELF input file. So make the .data alignment unconditional, and add a check whether relative relocations are still valid. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <[email protected]> --- BaseTools/Source/C/GenFw/Elf32Convert.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/BaseTools/Source/C/GenFw/Elf32Convert.c b/BaseTools/Source/C/GenFw/Elf32Convert.c index e1b92ebd713e..da3cde8f8e9b 100644 --- a/BaseTools/Source/C/GenFw/Elf32Convert.c +++ b/BaseTools/Source/C/GenFw/Elf32Convert.c @@ -366,10 +366,7 @@ ScanSections32 ( } mDebugOffset = mCoffOffset; - - if (mEhdr->e_machine != EM_ARM) { - mCoffOffset = CoffAlign(mCoffOffset); - } + mCoffOffset = CoffAlign(mCoffOffset); if (SectionCount > 1 && mOutImageType == FW_EFI_IMAGE) { Warning (NULL, 0, 0, NULL, "Mulitple sections in %s are merged into 1 text section. Source level debug might not work correctly.", mInImageName); @@ -719,7 +716,7 @@ WriteSections32 ( switch (ELF32_R_TYPE(Rel->r_info)) { case R_ARM_RBASE: // No relocation - no action required - // break skipped + break; case R_ARM_PC24: case R_ARM_XPC25: @@ -756,8 +753,17 @@ WriteSections32 ( case R_ARM_TLS_GD32: case R_ARM_TLS_LDM32: case R_ARM_TLS_IE32: - // Thease are all PC-relative relocations and don't require modification - // GCC does not seem to have the concept of a application that just needs to get relocated. + // + // These are all PC-relative relocations and don't require modification + // as long as the relative offset between the section containing the + // place and the section containing the reference has been preserved + // by the PE/COFF conversion. + // + if ((SymShdr->sh_addr - SecShdr->sh_addr) != + (mCoffSectionsOffset[Sym->st_shndx] - SecOffset)) { + Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s ARM relative relocations require identical ELF and PE/COFF section offsets", + mInImageName); + } break; case R_ARM_THM_MOVW_ABS_NC: -- 1.9.1 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
