On 18/10/2015 09:38, Jordan Justen wrote: > > This adjusts the previously introduced state save map access functions, to > > account for QEMU and KVM's 64-bit state save map following the AMD spec > > rather than the Intel one. > > Shouldn't this layout match the processor being emulated? I think I > recall hearing something about documentation?
Yes, exactly. Intel doesn't document the placement of the descriptor cache registers in the SMM state save map, so it's not possible to match the processor anyway. Paolo _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
