If there are any logical processor reporting an APIC ID of 255 or greater, set X2ApicEnable flag.
Cc: Feng Tian <[email protected]> Cc: Michael Kinney <[email protected]> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <[email protected]> --- UefiCpuPkg/CpuMpPei/CpuMpPei.c | 32 +++++++++++++++++++++++++++++--- UefiCpuPkg/CpuMpPei/CpuMpPei.h | 2 ++ 2 files changed, 31 insertions(+), 3 deletions(-) diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.c b/UefiCpuPkg/CpuMpPei/CpuMpPei.c index a301fe5..c6fcb8f 100644 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.c +++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.c @@ -158,6 +158,20 @@ GetX2ApicIdFromCpuId ( } /** + Enable x2APIC mode on APs. + + @param Buffer Pointer to private data buffer. +**/ +VOID +EFIAPI +ApFuncEnableX2Apic ( + IN OUT VOID *Buffer + ) +{ + SetApicMode (LOCAL_APIC_MODE_X2APIC); +} + +/** Get CPU MP Data pointer from the Guided HOB. @return Pointer to Pointer to PEI CPU MP Data @@ -211,6 +225,15 @@ ApCFunction ( } else { PeiCpuMpData->CpuData[NumApsExecuting].ApicId = GetX2ApicIdFromCpuId (); ASSERT (PeiCpuMpData->CpuData[NumApsExecuting].ApicId != 0xFFFFFFFF); + if (PeiCpuMpData->CpuData[NumApsExecuting].ApicId >= 0xFF) { + // + // Set x2APIC mode if there are any logical processor reporting + // an APIC ID of 255 or greater. + // + AcquireSpinLock(&PeiCpuMpData->MpLock); + PeiCpuMpData->X2ApicEnable = TRUE; + ReleaseSpinLock(&PeiCpuMpData->MpLock); + } } // // Sync BSP's Mtrr table to all wakeup APs and load microcode on APs. @@ -424,17 +447,19 @@ CountProcessorNumber ( // if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) > 1) { // - // Send broadcast IPI to APs to wakeup APs + // Send 1st broadcast IPI to APs to wakeup APs // - PeiCpuMpData->InitFlag = 1; + PeiCpuMpData->InitFlag = TRUE; + PeiCpuMpData->X2ApicEnable = FALSE; WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL); // // Wait for AP task to complete and then exit. // MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds)); - PeiCpuMpData->InitFlag = 0; + PeiCpuMpData->InitFlag = FALSE; PeiCpuMpData->CpuCount += (UINT32)PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting; ASSERT (PeiCpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber)); + // // Sort BSP/Aps by CPU APIC ID in ascending order // @@ -500,6 +525,7 @@ PrepareAPStartupVector ( PeiCpuMpData->CpuData[0].ApicId = GetInitialApicId (); PeiCpuMpData->CpuData[0].Health.Uint32 = 0; PeiCpuMpData->EndOfPeiFlag = FALSE; + InitializeSpinLock(&PeiCpuMpData->MpLock); CopyMem (&PeiCpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP)); // diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.h b/UefiCpuPkg/CpuMpPei/CpuMpPei.h index 9325a12..de90113 100644 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.h +++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.h @@ -124,6 +124,7 @@ typedef struct { // PEI CPU MP Data save in memory // struct _PEI_CPU_MP_DATA { + SPIN_LOCK MpLock; UINT32 CpuCount; UINT32 BspNumber; UINTN Buffer; @@ -137,6 +138,7 @@ struct _PEI_CPU_MP_DATA { volatile UINT32 FinishedCount; BOOLEAN EndOfPeiFlag; BOOLEAN InitFlag; + BOOLEAN X2ApicEnable; CPU_EXCHANGE_ROLE_INFO BSPInfo; CPU_EXCHANGE_ROLE_INFO APInfo; MTRR_SETTINGS MtrrTable; -- 1.9.5.msysgit.0 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
