TSS segment should use (SIZE - 1) as limit, and do not set G bit (highest bit
of LimitHigh) because limit means byte count.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yao, Jiewen <jiewen....@intel.com>
Cc: Fan, Jeff <jeff....@intel.com>
Cc: Kinney, Michael D <michael.d.kin...@intel.com>
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S | 8 ++++----
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm | 8 ++++----
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S | 4 ++--
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm | 4 ++--
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S
index 69dfd94..4130bf5 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S
@@ -82,18 +82,18 @@ CodeSeg64:
.equ GDT_SIZE, .- NullSeg
TssSeg:
- .word TSS_DESC_SIZE # LimitLow
+ .word TSS_DESC_SIZE -1 # LimitLow
.word 0 # BaseLow
.byte 0 # BaseMid
.byte 0x89
- .byte 0x80 # LimitHigh
+ .byte 0x00 # LimitHigh
.byte 0 # BaseHigh
ExceptionTssSeg:
- .word TSS_DESC_SIZE # LimitLow
+ .word TSS_DESC_SIZE - 1 # LimitLow
.word 0 # BaseLow
.byte 0 # BaseMid
.byte 0x89
- .byte 0x80 # LimitHigh
+ .byte 0x00 # LimitHigh
.byte 0 # BaseHigh
.equ CODE_SEL, CodeSeg32 - NullSeg
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm
index 65a120e..b4eb492 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm
@@ -85,18 +85,18 @@ CodeSeg64 LABEL QWORD
GDT_SIZE = $ - offset NullSeg
TssSeg LABEL QWORD
- DW TSS_DESC_SIZE ; LimitLow
+ DW TSS_DESC_SIZE - 1 ; LimitLow
DW 0 ; BaseLow
DB 0 ; BaseMid
DB 89h
- DB 080h ; LimitHigh
+ DB 00h ; LimitHigh
DB 0 ; BaseHigh
ExceptionTssSeg LABEL QWORD
- DW TSS_DESC_SIZE ; LimitLow
+ DW TSS_DESC_SIZE - 1 ; LimitLow
DW 0 ; BaseLow
DB 0 ; BaseMid
DB 89h
- DB 080h ; LimitHigh
+ DB 00h ; LimitHigh
DB 0 ; BaseHigh
CODE_SEL = offset CodeSeg32 - offset NullSeg
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S
index 6dbcaa5..2ae6f2c 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S
@@ -79,11 +79,11 @@ CodeSeg64:
.byte 0 # BaseHigh
# TSS Segment for X64 specially
TssSeg:
- .word TSS_DESC_SIZE # LimitLow
+ .word TSS_DESC_SIZE - 1 # LimitLow
.word 0 # BaseLow
.byte 0 # BaseMid
.byte 0x89
- .byte 0xDB # LimitHigh
+ .byte 0x00 # LimitHigh
.byte 0 # BaseHigh
.long 0 # BaseUpper
.long 0 # Reserved
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
index 3d841c6..ab71645 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
@@ -78,11 +78,11 @@ CodeSeg64 LABEL QWORD
DB 0 ; BaseHigh
; TSS Segment for X64 specially
TssSeg LABEL QWORD
- DW TSS_DESC_SIZE ; LimitLow
+ DW TSS_DESC_SIZE - 1 ; LimitLow
DW 0 ; BaseLow
DB 0 ; BaseMid
DB 89h
- DB 080h ; LimitHigh
+ DB 00h ; LimitHigh
DB 0 ; BaseHigh
DD 0 ; BaseUpper
DD 0 ; Reserved
--
1.9.5.msysgit.0
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