On 24 November 2015 at 09:25, Gao, Liming <liming....@intel.com> wrote:
> Reviewed-by: Liming Gao <liming....@intel.com>
>

Thanks. Committed as SVN r18931

> -----Original Message-----
> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> Sent: Tuesday, November 24, 2015 4:08 PM
> To: edk2-devel@lists.01.org; Gao, Liming; Zhu, Yonghong
> Cc: Ian Campbell; Ard Biesheuvel; Stefano Stabellini; Laszlo Ersek; Julien 
> Grall; Leif Lindholm
> Subject: Re: [PATCH 1/6] BaseTools/GenFw ARM: allow R_ARM_REL32 relocations
>
> (add BaseTools maintainers)
>
> On 23 November 2015 at 17:56, Ard Biesheuvel <ard.biesheu...@linaro.org> 
> wrote:
>> R_ARM_REL32 are relative relocations, so we don't need to do anything
>> special when performing the ELF to PE/COFF conversion, since our
>> memory layout is identical between the two binary formats. So just allow 
>> them.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
>> ---
>>  BaseTools/Source/C/GenFw/Elf32Convert.c | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/BaseTools/Source/C/GenFw/Elf32Convert.c
>> b/BaseTools/Source/C/GenFw/Elf32Convert.c
>> index a7b077873b40..469394540e6a 100644
>> --- a/BaseTools/Source/C/GenFw/Elf32Convert.c
>> +++ b/BaseTools/Source/C/GenFw/Elf32Convert.c
>> @@ -716,6 +716,7 @@ WriteSections32 (
>>              // break skipped
>>
>>            case R_ARM_PC24:
>> +          case R_ARM_REL32:
>>            case R_ARM_XPC25:
>>            case R_ARM_THM_PC22:
>>            case R_ARM_THM_JUMP19:
>> @@ -844,6 +845,7 @@ WriteRelocations32 (
>>                // break skipped
>>
>>              case R_ARM_PC24:
>> +            case R_ARM_REL32:
>>              case R_ARM_XPC25:
>>              case R_ARM_THM_PC22:
>>              case R_ARM_THM_JUMP19:
>> --
>> 1.9.1
>>
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