So that we can use write-protection for code later.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen....@intel.com>
Cc: "Fan, Jeff" <jeff....@intel.com>
Cc: "Kinney, Michael D" <michael.d.kin...@intel.com>
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S   | 1 +
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm | 1 +
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S    | 1 +
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm  | 1 +
 4 files changed, 4 insertions(+)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S
index 7e1787c..8e64ce8 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S
@@ -142,6 +142,7 @@ L13:
 
     movl    %cr0, %ebx
     orl     $0x080000000, %ebx             # enable paging
+    orl     $0x000010000, %ebx             # set WP
     movl    %ebx, %cr0
     leal    DSC_OFFSET(%edi),%ebx
     movw    DSC_DS(%ebx),%ax
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm
index e6af344..a955785 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm
@@ -148,6 +148,7 @@ gSmiCr3     DD      ?
 
     mov     ebx, cr0
     or      ebx, 080000000h             ; enable paging
+    or      ebx, 000010000h             ; set WP
     mov     cr0, ebx
     lea     ebx, [edi + DSC_OFFSET]
     mov     ax, [ebx + DSC_DS]
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S
index 1d40819..8050a00 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S
@@ -163,6 +163,7 @@ NxeDone:
     wrmsr
     movq    %cr0, %rbx
     btsl    $31, %ebx
+    btsl    $16, %ebx                   # set WP
     movq    %rbx, %cr0
     retf
 LongMode:                               # long mode (64-bit code) starts here
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm
index 6e1d3f1..db170d6 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm
@@ -159,6 +159,7 @@ Base:
     wrmsr
     mov     rbx, cr0
     bts     ebx, 31
+    bts     ebx, 16                    ; set WP
     mov     cr0, rbx
     retf
 @LongMode:                              ; long mode (64-bit code) starts here
-- 
1.9.5.msysgit.0

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