Jaben, you mean to change VERSION_STRING = 1.0 to VERSION_STRING = 1.1 ? Regards, Ray
-----Original Message----- From: Carsey, Jaben Sent: Thursday, December 3, 2015 1:27 AM To: Ni, Ruiyu <ruiyu...@intel.com>; edk2-devel@lists.01.org Cc: Ni, Ruiyu <ruiyu...@intel.com>; Qiu, Shumin <shumin....@intel.com>; Carsey, Jaben <jaben.car...@intel.com> Subject: RE: [edk2] [Patch 2/2] ShellPkg/mm: Fix mm to support multiple root bridge platform I propose to rev the version of the library + 0.1 in the INF file? Reviewed-by: Jaben Carsey <jaben.car...@intel.com> > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of > Ruiyu Ni > Sent: Tuesday, December 01, 2015 9:54 PM > To: edk2-devel@lists.01.org > Cc: Ni, Ruiyu <ruiyu...@intel.com>; Qiu, Shumin <shumin....@intel.com> > Subject: [edk2] [Patch 2/2] ShellPkg/mm: Fix mm to support multiple root > bridge platform > Importance: High > > In multiple root bridge platforms, different root bridges may > share the same segment but occupy different range of buses, > or may occupy different segments. > The fix is to find the correct root bridge IO instance by > comparing not only the segment but also the bus ranges. > Directly use Cpu Io for MMIO and IO accesses because some MMIO > or IO is not occupied by PCI devices so it doesn't make sense > to use root bridge IO to access them. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ruiyu Ni <ruiyu...@intel.com> > Cc: Shumin Qiu <shumin....@intel.com> > --- > ShellPkg/Library/UefiShellDebug1CommandsLib/Mm.c | 329 +++++++++++- > --------- > .../UefiShellDebug1CommandsLib.h | 3 +- > .../UefiShellDebug1CommandsLib.inf | 1 + > .../UefiShellDebug1CommandsLib.uni | Bin 139696 -> 139768 > bytes > 4 files changed, 181 insertions(+), 152 deletions(-) > > diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Mm.c > b/ShellPkg/Library/UefiShellDebug1CommandsLib/Mm.c > index ca64f2c..fa1451c 100644 > --- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Mm.c > +++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Mm.c > @@ -2,7 +2,7 @@ > Main file for Mm shell Debug1 function. > > (C) Copyright 2015 Hewlett-Packard Development Company, L.P.<BR> > - Copyright (c) 2005 - 2014, Intel Corporation. All rights reserved.<BR> > + Copyright (c) 2005 - 2015, Intel Corporation. All rights reserved.<BR> > This program and the accompanying materials > are licensed and made available under the terms and conditions of the BSD > License > which accompanies this distribution. The full text of the license may be > found at > @@ -19,12 +19,30 @@ > #include <Protocol/DeviceIo.h> > > typedef enum { > - EfiMemory, > - EFIMemoryMappedIo, > - EfiIo, > - EfiPciConfig, > - EfiPciEConfig > -} EFI_ACCESS_TYPE; > + ShellMmMemory, > + ShellMmMemoryMappedIo, > + ShellMmIo, > + ShellMmPci, > + ShellMmPciExpress > +} SHELL_MM_ACCESS_TYPE; > + > +typedef struct { > + UINT64 Register : 12; > + UINT64 Function : 8; > + UINT64 Device : 8; > + UINT64 Bus : 8; > + UINT64 Segment : 8; > + UINT64 Reserved : 20; > +} SHELL_MM_PCIE_ADDRESS; > + > +typedef struct { > + UINT64 Register : 8; > + UINT64 Function : 8; > + UINT64 Device : 8; > + UINT64 Bus : 8; > + UINT64 Segment : 8; > + UINT64 Reserved : 24; > +} SHELL_MM_PCI_ADDRESS; > > STATIC CONST SHELL_PARAM_ITEM ParamList[] = { > {L"-mmio", TypeFlag}, > @@ -37,7 +55,7 @@ STATIC CONST SHELL_PARAM_ITEM ParamList[] = { > {NULL, TypeMax} > }; > > -STATIC CONST UINT64 MaxNum[9] = { 0xff, 0xffff, 0xffffffff, > 0xffffffffffffffffULL }; > +STATIC CONST UINT64 mShellMmMaxNumber[9] = { 0xff, 0xffff, 0xffffffff, > 0xffffffffffffffffULL }; > > /** > Read some data into a buffer from memory. > @@ -176,22 +194,43 @@ GetHex ( > } > > /** > - Get the PCI-E Address from a PCI address format 0x0000ssbbddffrrr > - where ss is SEGMENT, bb is BUS, dd is DEVICE, ff is FUNCTION > - and rrr is REGISTER (extension format for PCI-E). > - > - @param[in] InputAddress PCI address format on input. > - @param[out]PciEAddress PCI-E address extention format. > + Extract the PCI segment, bus, device, function, register from > + from a SHELL_MM_PCI or SHELL_MM_PCIE format of address.. > + > + @param[in] AccessType Access type. > + @param[in] Address SHELL_MM_PCI or SHELL_MM_PCIE address. > + @param[out] Segment PCI segment number. > + @param[out] Bus PCI bus number. > + @param[out] Device PCI device number. > + @param[out] Function PCI function number. > + @param[out] Register PCI register offset. > **/ > VOID > EFIAPI > -GetPciEAddressFromInputAddress ( > - IN UINT64 InputAddress, > - OUT UINT64 *PciEAddress > +ShellMmDecodePciAddress ( > + IN SHELL_MM_ACCESS_TYPE AccessType, > + IN UINT64 Address, > + OUT UINT32 *Segment, > + OUT UINT8 *Bus, > + OUT UINT8 *Device, > + OUT UINT8 *Function, > + OUT UINT32 *Register > ) > { > - *PciEAddress = RShiftU64(InputAddress & ~(UINT64) 0xFFF, 4); > - *PciEAddress += LShiftU64((UINT16) InputAddress & 0x0FFF, 32); > + ASSERT ((AccessType == ShellMmPci) || (AccessType == > ShellMmPciExpress)); > + if (AccessType == ShellMmPci) { > + *Segment = (UINT32) ((SHELL_MM_PCI_ADDRESS *) (&Address))- > >Segment; > + *Bus = (UINT8) ((SHELL_MM_PCI_ADDRESS *) (&Address))->Bus; > + *Device = (UINT8) ((SHELL_MM_PCI_ADDRESS *) (&Address))->Device; > + *Function = (UINT8) ((SHELL_MM_PCI_ADDRESS *) (&Address))- > >Function; > + *Register = (UINT32) ((SHELL_MM_PCI_ADDRESS *) (&Address))- > >Register; > + } else { > + *Segment = (UINT32) ((SHELL_MM_PCIE_ADDRESS *) (&Address))- > >Segment; > + *Bus = (UINT8) ((SHELL_MM_PCIE_ADDRESS *) (&Address))->Bus; > + *Device = (UINT8) ((SHELL_MM_PCIE_ADDRESS *) (&Address))->Device; > + *Function = (UINT8) ((SHELL_MM_PCIE_ADDRESS *) (&Address))- > >Function; > + *Register = (UINT32) ((SHELL_MM_PCIE_ADDRESS *) (&Address))- > >Register; > + } > } > > /** > @@ -207,36 +246,38 @@ ShellCommandRunMm ( > IN EFI_SYSTEM_TABLE *SystemTable > ) > { > - EFI_STATUS Status; > - EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *IoDev; > - UINT64 Address; > - UINT64 PciEAddress; > - UINT64 Value; > - UINT32 SegmentNumber; > - EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width; > - EFI_ACCESS_TYPE AccessType; > - UINT64 Buffer; > - UINTN Index; > - UINTN Size; > -// CHAR16 *ValueStr; > - BOOLEAN Complete; > - CHAR16 *InputStr; > - BOOLEAN Interactive; > - EFI_HANDLE *HandleBuffer; > - UINTN BufferSize; > - UINTN ItemValue; > - LIST_ENTRY *Package; > - CHAR16 *ProblemParam; > - SHELL_STATUS ShellStatus; > - CONST CHAR16 *Temp; > + EFI_STATUS Status; > + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo; > + EFI_CPU_IO2_PROTOCOL *CpuIo; > + UINT64 Address; > + UINT64 Value; > + UINT32 Segment; > + UINT8 Bus; > + UINT8 Device; > + UINT8 Function; > + UINT32 Register; > + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width; > + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors; > + SHELL_MM_ACCESS_TYPE AccessType; > + UINT64 Buffer; > + UINTN Index; > + UINT32 Size; > + BOOLEAN Complete; > + CHAR16 *InputStr; > + BOOLEAN Interactive; > + EFI_HANDLE *HandleBuffer; > + UINTN HandleCount; > + UINTN ItemValue; > + LIST_ENTRY *Package; > + CHAR16 *ProblemParam; > + SHELL_STATUS ShellStatus; > + CONST CHAR16 *Temp; > > Value = 0; > Address = 0; > - PciEAddress = 0; > - IoDev = NULL; > + PciRootBridgeIo = NULL; > HandleBuffer = NULL; > - BufferSize = 0; > - SegmentNumber = 0; > + HandleCount = 0; > ShellStatus = SHELL_SUCCESS; > InputStr = NULL; > > @@ -245,8 +286,7 @@ ShellCommandRunMm ( > // > Width = EfiPciWidthUint8; > Size = 1; > - AccessType = EfiMemory; > -// ValueStr = NULL; > + AccessType = ShellMmMemory; > Interactive = TRUE; > Package = NULL; > > @@ -275,7 +315,7 @@ ShellCommandRunMm ( > goto Done; > } else { > if (ShellCommandLineGetFlag(Package, L"-mmio")) { > - AccessType = EFIMemoryMappedIo; > + AccessType = ShellMmMemoryMappedIo; > if (ShellCommandLineGetFlag(Package, L"-mem") > ||ShellCommandLineGetFlag(Package, L"-io") > ||ShellCommandLineGetFlag(Package, L"-pci") > @@ -286,7 +326,7 @@ ShellCommandRunMm ( > goto Done; > } > } else if (ShellCommandLineGetFlag(Package, L"-mem")) { > - AccessType = EfiMemory; > + AccessType = ShellMmMemory; > if (ShellCommandLineGetFlag(Package, L"-io") > ||ShellCommandLineGetFlag(Package, L"-pci") > ||ShellCommandLineGetFlag(Package, L"-pcie") > @@ -296,7 +336,7 @@ ShellCommandRunMm ( > goto Done; > } > } else if (ShellCommandLineGetFlag(Package, L"-io")) { > - AccessType = EfiIo; > + AccessType = ShellMmIo; > if (ShellCommandLineGetFlag(Package, L"-pci") > ||ShellCommandLineGetFlag(Package, L"-pcie") > ){ > @@ -305,7 +345,7 @@ ShellCommandRunMm ( > goto Done; > } > } else if (ShellCommandLineGetFlag(Package, L"-pci")) { > - AccessType = EfiPciConfig; > + AccessType = ShellMmPci; > if (ShellCommandLineGetFlag(Package, L"-pcie") > ){ > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), > gShellDebug1HiiHandle, L"mm"); > @@ -313,7 +353,7 @@ ShellCommandRunMm ( > goto Done; > } > } else if (ShellCommandLineGetFlag(Package, L"-pcie")) { > - AccessType = EfiPciEConfig; > + AccessType = ShellMmPciExpress; > } > } > > @@ -375,27 +415,9 @@ ShellCommandRunMm ( > ShellStatus = SHELL_INVALID_PARAMETER; > goto Done; > } > - switch (Size) { > - case 1: > - if (Value > 0xFF) { > - ShellStatus = SHELL_INVALID_PARAMETER; > - } > - break; > > - case 2: > - if (Value > 0xFFFF) { > - ShellStatus = SHELL_INVALID_PARAMETER; > - } > - break; > - > - case 4: > - if (Value > 0xFFFFFFFF) { > - ShellStatus = SHELL_INVALID_PARAMETER; > - } > - break; > - > - default: > - break; > + if (Value > mShellMmMaxNumber[Width]) { > + ShellStatus = SHELL_INVALID_PARAMETER; > } > > if (ShellStatus != SHELL_SUCCESS) { > @@ -413,77 +435,87 @@ ShellCommandRunMm ( > // > // locate DeviceIO protocol interface > // > - if (AccessType != EfiMemory) { > + if ((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) { > + ShellMmDecodePciAddress (AccessType, Address, &Segment, &Bus, > &Device, &Function, &Register); > + > Status = gBS->LocateHandleBuffer ( > - ByProtocol, > - &gEfiPciRootBridgeIoProtocolGuid, > - NULL, > - &BufferSize, > - &HandleBuffer > - ); > + ByProtocol, > + &gEfiPciRootBridgeIoProtocolGuid, > + NULL, > + &HandleCount, > + &HandleBuffer > + ); > if (EFI_ERROR (Status)) { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_PCIRBIO_NF), > gShellDebug1HiiHandle, L"mm"); > ShellStatus = SHELL_NOT_FOUND; > goto Done; > } > + > // > - // In the case of PCI or PCIE > - // Get segment number and mask the segment bits in Address > - // > - if (AccessType == EfiPciEConfig) { > - SegmentNumber = (UINT32) RShiftU64 (Address, 36) & 0xff; > - Address &= 0xfffffffffULL; > - } else { > - if (AccessType == EfiPciConfig) { > - SegmentNumber = (UINT32) RShiftU64 (Address, 32) & 0xff; > - Address &= 0xffffffff; > - } > - } > - // > - // Find the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL of the specified > segment number > + // Find the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL of the specified > segment & bus number > // > - for (Index = 0; Index < BufferSize; Index++) { > + for (Index = 0; Index < HandleCount; Index++) { > Status = gBS->HandleProtocol ( > - HandleBuffer[Index], > - &gEfiPciRootBridgeIoProtocolGuid, > - (VOID *) &IoDev > - ); > - if (EFI_ERROR (Status)) { > - continue; > + HandleBuffer[Index], > + &gEfiPciRootBridgeIoProtocolGuid, > + (VOID *) &PciRootBridgeIo > + ); > + if (!EFI_ERROR (Status) && (PciRootBridgeIo->SegmentNumber == > Segment)) { > + Status = PciRootBridgeIo->Configuration (PciRootBridgeIo, (VOID **) > &Descriptors); > + } > + if (!EFI_ERROR (Status)) { > + Status = EFI_NOT_FOUND; > + while (Descriptors->Desc != ACPI_END_TAG_DESCRIPTOR) { > + if (Descriptors->ResType == ACPI_ADDRESS_SPACE_TYPE_BUS) { > + if ((Bus >= Descriptors->AddrRangeMin) && (Bus <= Descriptors- > >AddrRangeMax)) { > + Status = EFI_SUCCESS; > + break; > + } > + } > + Descriptors++; > + } > } > - if (IoDev->SegmentNumber != SegmentNumber) { > - IoDev = NULL; > + > + if (!EFI_ERROR (Status)) { > + break; > } > } > - if (IoDev == NULL) { > - ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN > (STR_MM_SEGMENT_NOT_FOUND), gShellDebug1HiiHandle, L"mm", > SegmentNumber); > + if (HandleBuffer != NULL) { > + FreePool (HandleBuffer); > + } > + if (Index == HandleCount) { > + ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN > (STR_MM_PCIE_ADDRESS_RANGE), gShellDebug1HiiHandle, L"mm", Address); > ShellStatus = SHELL_INVALID_PARAMETER; > - goto Done; > } > + } else { > + Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **) > &CpuIo); > } > > - if (AccessType == EfiIo && Address + Size > 0x10000) { > - ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS_RANGE), > gShellDebug1HiiHandle, L"mm"); > + if (AccessType == ShellMmIo && Address + Size > MAX_UINT16) { > + ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN > (STR_MM_IO_ADDRESS_RANGE), gShellDebug1HiiHandle, L"mm"); > ShellStatus = SHELL_INVALID_PARAMETER; > - goto Done; > } > > - if (AccessType == EfiPciEConfig) { > - GetPciEAddressFromInputAddress (Address, &PciEAddress); > + if (EFI_ERROR (Status)) { > + goto Done; > } > > // > // Set value > // > if (ShellCommandLineGetRawValue(Package, 2) != NULL) { > - if (AccessType == EFIMemoryMappedIo) { > - IoDev->Mem.Write (IoDev, Width, Address, 1, &Value); > - } else if (AccessType == EfiIo) { > - IoDev->Io.Write (IoDev, Width, Address, 1, &Value); > - } else if (AccessType == EfiPciConfig) { > - IoDev->Pci.Write (IoDev, Width, Address, 1, &Value); > - } else if (AccessType == EfiPciEConfig) { > - IoDev->Pci.Write (IoDev, Width, PciEAddress, 1, &Value); > + if (AccessType == ShellMmMemoryMappedIo) { > + CpuIo->Mem.Write (CpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH) Width, > Address, 1, &Value); > + } else if (AccessType == ShellMmIo) { > + CpuIo->Io.Write (CpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH) Width, > Address, 1, &Value); > + } else if ((AccessType == ShellMmPci) || (AccessType == > ShellMmPciExpress)) { > + PciRootBridgeIo->Pci.Write ( > + PciRootBridgeIo, > + Width, > + EFI_PCI_ADDRESS (Bus, Device, Function, Register), > + 1, > + &Value > + ); > } else { > WriteMem (Width, Address, 1, &Value); > } > @@ -498,26 +530,26 @@ ShellCommandRunMm ( > // > if (!Interactive) { > Buffer = 0; > - if (AccessType == EFIMemoryMappedIo) { > + if (AccessType == ShellMmMemoryMappedIo) { > if (!gEfiShellProtocol->BatchIsActive()) { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_MMIO), > gShellDebug1HiiHandle); > } > - IoDev->Mem.Read (IoDev, Width, Address, 1, &Buffer); > - } else if (AccessType == EfiIo) { > + CpuIo->Mem.Read (CpuIo, Width, Address, 1, &Buffer); > + } else if (AccessType == ShellMmIo) { > if (!gEfiShellProtocol->BatchIsActive()) { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_IO), > gShellDebug1HiiHandle); > } > - IoDev->Io.Read (IoDev, Width, Address, 1, &Buffer); > - } else if (AccessType == EfiPciConfig) { > + CpuIo->Io.Read (CpuIo, Width, EFI_PCI_ADDRESS (Bus, Device, Function, > Register), 1, &Buffer); > + } else if (AccessType == ShellMmPci) { > if (!gEfiShellProtocol->BatchIsActive()) { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_PCI), > gShellDebug1HiiHandle); > } > - IoDev->Pci.Read (IoDev, Width, Address, 1, &Buffer); > - } else if (AccessType == EfiPciEConfig) { > + PciRootBridgeIo->Pci.Read (PciRootBridgeIo, Width, EFI_PCI_ADDRESS > (Bus, Device, Function, Register), 1, &Buffer); > + } else if (AccessType == ShellMmPciExpress) { > if (!gEfiShellProtocol->BatchIsActive()) { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_PCIE), > gShellDebug1HiiHandle); > } > - IoDev->Pci.Read (IoDev, Width, PciEAddress, 1, &Buffer); > + PciRootBridgeIo->Pci.Read (PciRootBridgeIo, Width, EFI_PCI_ADDRESS > (Bus, Device, Function, Register), 1, &Buffer); > } else { > if (!gEfiShellProtocol->BatchIsActive()) { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_MEM), > gShellDebug1HiiHandle); > @@ -547,24 +579,24 @@ ShellCommandRunMm ( > // > Complete = FALSE; > do { > - if (AccessType == EfiIo && Address + Size > 0x10000) { > + if (AccessType == ShellMmIo && Address + Size > 0x10000) { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN > (STR_MM_ADDRESS_RANGE2), gShellDebug1HiiHandle, L"mm"); > break; > } > > Buffer = 0; > - if (AccessType == EFIMemoryMappedIo) { > + if (AccessType == ShellMmMemoryMappedIo) { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_MMIO), > gShellDebug1HiiHandle); > - IoDev->Mem.Read (IoDev, Width, Address, 1, &Buffer); > - } else if (AccessType == EfiIo) { > + CpuIo->Mem.Read (CpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH) Width, > Address, 1, &Buffer); > + } else if (AccessType == ShellMmIo) { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_IO), > gShellDebug1HiiHandle); > - IoDev->Io.Read (IoDev, Width, Address, 1, &Buffer); > - } else if (AccessType == EfiPciConfig) { > + CpuIo->Io.Read (CpuIo, (EFI_CPU_IO_PROTOCOL_WIDTH) Width, > Address, 1, &Buffer); > + } else if (AccessType == ShellMmPci) { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_PCI), > gShellDebug1HiiHandle); > - IoDev->Pci.Read (IoDev, Width, Address, 1, &Buffer); > - } else if (AccessType == EfiPciEConfig) { > + PciRootBridgeIo->Pci.Read (PciRootBridgeIo, Width, EFI_PCI_ADDRESS > (Bus, Device, Function, Register), 1, &Buffer); > + } else if (AccessType == ShellMmPciExpress) { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_PCIE), > gShellDebug1HiiHandle); > - IoDev->Pci.Read (IoDev, Width, PciEAddress, 1, &Buffer); > + PciRootBridgeIo->Pci.Read (PciRootBridgeIo, Width, EFI_PCI_ADDRESS > (Bus, Device, Function, Register), 1, &Buffer); > } else { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_MEM), > gShellDebug1HiiHandle); > ReadMem (Width, Address, 1, &Buffer); > @@ -605,30 +637,28 @@ ShellCommandRunMm ( > // > // Continue to next address > // > - } else if (GetHex (InputStr + Index, &Buffer) && Buffer <= > MaxNum[Width]) { > - if (AccessType == EFIMemoryMappedIo) { > - IoDev->Mem.Write (IoDev, Width, Address, 1, &Buffer); > - } else if (AccessType == EfiIo) { > - IoDev->Io.Write (IoDev, Width, Address, 1, &Buffer); > - } else if (AccessType == EfiPciConfig) { > - IoDev->Pci.Write (IoDev, Width, Address, 1, &Buffer); > - } else if (AccessType == EfiPciEConfig) { > - IoDev->Pci.Write (IoDev, Width, PciEAddress, 1, &Buffer); > + } else if (GetHex (InputStr + Index, &Buffer) && Buffer <= > mShellMmMaxNumber[Width]) { > + if (AccessType == ShellMmMemoryMappedIo) { > + PciRootBridgeIo->Mem.Write (PciRootBridgeIo, Width, Address, 1, > &Buffer); > + } else if (AccessType == ShellMmIo) { > + PciRootBridgeIo->Io.Write (PciRootBridgeIo, Width, Address, 1, > &Buffer); > + } else if (AccessType == ShellMmPci) { > + PciRootBridgeIo->Pci.Write (PciRootBridgeIo, Width, EFI_PCI_ADDRESS > (Bus, Device, Function, Register), 1, &Buffer); > + } else if (AccessType == ShellMmPciExpress) { > + PciRootBridgeIo->Pci.Write (PciRootBridgeIo, Width, EFI_PCI_ADDRESS > (Bus, Device, Function, Register), 1, &Buffer); > } else { > WriteMem (Width, Address, 1, &Buffer); > } > } else { > ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_ERROR), > gShellDebug1HiiHandle, L"mm"); > continue; > - // PrintToken (STRING_TOKEN (STR_IOMOD_ERROR), HiiHandle); > } > > Address += Size; > - if (AccessType == EfiPciEConfig) { > - GetPciEAddressFromInputAddress (Address, &PciEAddress); > + if ((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) { > + ShellMmDecodePciAddress (AccessType, Address, &Segment, &Bus, > &Device, &Function, &Register); > } > ShellPrintEx(-1, -1, L"\r\n"); > - // Print (L"\n"); > } while (!Complete); > } > ASSERT(ShellStatus == SHELL_SUCCESS); > @@ -637,9 +667,6 @@ Done: > if (InputStr != NULL) { > FreePool(InputStr); > } > - if (HandleBuffer != NULL) { > - FreePool (HandleBuffer); > - } > if (Package != NULL) { > ShellCommandLineFreeVarList (Package); > } > diff --git > a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Command > sLib.h > b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Command > sLib.h > index d8755bf..ec15155 100644 > --- > a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Command > sLib.h > +++ > b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Command > sLib.h > @@ -1,7 +1,7 @@ > /** @file > Main file for NULL named library for Profile1 shell command functions. > > - Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR> > + Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR> > This program and the accompanying materials > are licensed and made available under the terms and conditions of the BSD > License > which accompanies this distribution. The full text of the license may be > found at > @@ -38,6 +38,7 @@ > #include <Protocol/DriverFamilyOverride.h> > #include <Protocol/DriverHealth.h> > #include <Protocol/SimplePointer.h> > +#include <Protocol/CpuIo2.h> > #include <Protocol/PciRootBridgeIo.h> > > #include <Library/BaseLib.h> > diff --git > a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Command > sLib.inf > b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Command > sLib.inf > index 55371eb..3579454 100644 > --- > a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Command > sLib.inf > +++ > b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Command > sLib.inf > @@ -125,6 +125,7 @@ > gEfiPciRootBridgeIoProtocolGuid ## CONSUMES > gEfiBlockIoProtocolGuid ## CONSUMES > gEfiSimplePointerProtocolGuid ## CONSUMES > + gEfiCpuIo2ProtocolGuid ## CONSUMES > > [Guids] > gEfiGlobalVariableGuid ## SOMETIMES_CONSUMES ## GUID > diff --git > a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Command > sLib.uni > b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Command > sLib.uni > index > 2608cc39bd4efe2514a63209f673707313227f71..9e4f7dc0b8c2a13640294 > 4fb0771ffbdbd9f422a 100644 > GIT binary patch > delta 80 > zcmdmRnB&J`jtyxclP`p^F}h9`43(c;!f7=5Rj?DU0z(-?B0~;CCPNB?!gSUcM#bsN > kVi^S{8*oZYP6%OR_GIt}s#l)O!C};#6S_Sol+oo305{VZ#sB~S > > delta 80 > zcmexym}3JFrG@YYGq^IiGx!2YKZcOW7ZW5Wr|}p~o{}ZRm@?h)38U&{15Sy_ > 2_bBg > iJ0kcd7laB;uTo{yn4BOjFxe|wulZ5v_D7+NVrKv~E*n7r > > -- > 1.9.5.msysgit.1 > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
