On Tue, Dec 08, 2015 at 03:03:05PM +0100, Ard Biesheuvel wrote:
> Commit SVN r18778 made all mappings of normal memory (inner) shareable,
> even on hardware that implements shareability as uncached accesses.
> The original concerns that prompted the change, regarding coherent DMA
> and virt guests migrating between CPUs, do not apply to such hardware,
> so revert to the original behavior in that case.
I like the logic, but...
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
> ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c | 38 ++++++++++++++++++--
> 1 file changed, 35 insertions(+), 3 deletions(-)
>
> diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
> b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
> index 23d2e43beba0..8aecbe8cc354 100644
> --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
> +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
> @@ -42,6 +42,38 @@ ConvertSectionAttributesToPageAttributes (
> }
>
> STATIC
> +BOOLEAN
> +PreferNonshareableMemory (
> + VOID
> + )
> +{
> + UINTN Mmfr;
> + BOOLEAN Result;
> +
> + if (FeaturePcdGet (PcdNormalMemoryNonshareableOverride)) {
> + return TRUE;
> + }
> +
> + //
> + // Check whether the innermost level of shareability (the level we will use
> + // by default to map normal memory) is implemented with hardware coherency
> + // support. Otherwise, revert to mapping as non-shareable.
> + //
> + Mmfr = ArmReadIdMmfr0 ();
> + switch ((Mmfr >> 12) & 0xf) {
> + case 0x1:
> + // two levels of shareability
> + Result = ((Mmfr >> 28) & 0xf) != 1;
> + break;
> + default:
> + // one level of shareability
> + Result = ((Mmfr >> 8) & 0xf) != 1;
> + break;
... can we get some defines for the shift offsets, masks and field values?
> + }
> + return Result;
> +}
> +
> +STATIC
> VOID
> PopulateLevel2PageTable (
> IN UINT32 *SectionEntry,
> @@ -80,7 +112,7 @@ PopulateLevel2PageTable (
> break;
> }
>
> - if (FeaturePcdGet(PcdNormalMemoryNonshareableOverride)) {
> + if (PreferNonshareableMemory ()) {
> PageAttributes &= ~TT_DESCRIPTOR_PAGE_S_SHARED;
> }
>
> @@ -189,7 +221,7 @@ FillTranslationTable (
> break;
> }
>
> - if (FeaturePcdGet(PcdNormalMemoryNonshareableOverride)) {
> + if (PreferNonshareableMemory ()) {
> Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
> }
>
> @@ -281,7 +313,7 @@ ArmConfigureMmu (
> }
>
> if (TTBRAttributes & TTBR_SHAREABLE) {
> - if (FeaturePcdGet(PcdNormalMemoryNonshareableOverride)) {
> + if (PreferNonshareableMemory ()) {
> TTBRAttributes ^= TTBR_SHAREABLE;
> } else {
> //
> --
> 1.9.1
>
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