On Mon, Dec 14, 2015 at 05:25:04PM +0100, Ard Biesheuvel wrote:
> The open coded access to co-processor #10 to set FPEXC is not supported
> by the CLANG assembler, but the architecturally correct VMSR instruction
> is not supported by older binutils. So keep the former unless __clang__
> is defined.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>

Oh dear...
Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org>

> ---
>  ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S 
> b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
> index 7de1b11ef818..50c760f335de 100644
> --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
> +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
> @@ -298,7 +298,11 @@ ASM_PFX(ArmEnableVFP):
>    isb
>    # Set EN bit in FPEXC. The Advanced SIMD and VFP extensions are enabled 
> and operate normally.
>    mov     r0, #0x40000000
> +#ifndef __clang__
>    mcr     p10,#0x7,r0,c8,c0,#0
> +#else
> +  vmsr    fpexc, r0
> +#endif
>    bx      lr
>  
>  ASM_PFX(ArmCallWFI):
> -- 
> 2.5.0
> 
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