... in preparation for the next patch.
Cc: Ruiyu Ni <[email protected]>
Cc: Michael Kinney <[email protected]>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <[email protected]>
---
MdeModulePkg/Include/Library/PciHostBridgeLib.h | 40
++++++++++----------
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 18 ++++-----
2 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/MdeModulePkg/Include/Library/PciHostBridgeLib.h
b/MdeModulePkg/Include/Library/PciHostBridgeLib.h
index b1dba0f754d7..16ad104a9368 100644
--- a/MdeModulePkg/Include/Library/PciHostBridgeLib.h
+++ b/MdeModulePkg/Include/Library/PciHostBridgeLib.h
@@ -25,26 +25,26 @@ typedef struct {
} PCI_ROOT_BRIDGE_APERTURE;
typedef struct {
- UINT32 Segment; ///< Segment number.
- UINT64 Supports; ///< Supported attributes.
- ///< Refer to
EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
- ///< and SetAttributes() in
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
- UINT64 Attributes; ///< Initial attributes.
- ///< Refer to
EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
- ///< and SetAttributes() in
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
- BOOLEAN DmaAbove4G; ///< DMA above 4GB memory.
- ///< Set to TRUE when root
bridge supports DMA above 4GB memory.
- UINT64 AllocationAttributes; ///< Allocation attributes.
- ///< Refer to
EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and
- ///<
EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes()
- ///< in
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
- PCI_ROOT_BRIDGE_APERTURE Bus; ///< Bus aperture which can
be used by the root bridge.
- PCI_ROOT_BRIDGE_APERTURE Io; ///< IO aperture which can be
used by the root bridge.
- PCI_ROOT_BRIDGE_APERTURE Mem; ///< MMIO aperture below 4GB
which can be used by the root bridge.
- PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO aperture above 4GB
which can be used by the root bridge.
- PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable MMIO
aperture below 4GB which can be used by the root bridge.
- PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable MMIO
aperture above 4GB which can be used by the root bridge.
- EFI_DEVICE_PATH_PROTOCOL *DevicePath; ///< Device path.
+ UINT32 Segment; ///< Segment number.
+ UINT64 Supports; ///< Supported attributes.
+ ///< Refer to
EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
+ ///< and SetAttributes() in
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ UINT64 Attributes; ///< Initial attributes.
+ ///< Refer to
EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
+ ///< and SetAttributes() in
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ BOOLEAN DmaAbove4G; ///< DMA above 4GB memory.
+ ///< Set to TRUE when root
bridge supports DMA above 4GB memory.
+ UINT64 AllocationAttributes; ///< Allocation attributes.
+ ///< Refer to
EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and
+ ///<
EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes()
+ ///< in
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
+ PCI_ROOT_BRIDGE_APERTURE Bus; ///< Bus aperture which can
be used by the root bridge.
+ PCI_ROOT_BRIDGE_APERTURE Io; ///< IO aperture which can
be used by the root bridge.
+ PCI_ROOT_BRIDGE_APERTURE Mem; ///< MMIO aperture below 4GB
which can be used by the root bridge.
+ PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO aperture above 4GB
which can be used by the root bridge.
+ PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable MMIO
aperture below 4GB which can be used by the root bridge.
+ PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable MMIO
aperture above 4GB which can be used by the root bridge.
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath; ///< Device path.
} PCI_ROOT_BRIDGE;
/**
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
index 332860eb3819..932aefd5d621 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -78,18 +78,18 @@ CreateRootBridge (
DEBUG ((EFI_D_INFO, "RootBridge: "));
DEBUG ((EFI_D_INFO, "%s\n", DevicePathStr = ConvertDevicePathToText
(Bridge->DevicePath, FALSE, FALSE)));
- DEBUG ((EFI_D_INFO, "Support/Attr: %lx / %lx\n", Bridge->Supports,
Bridge->Attributes));
- DEBUG ((EFI_D_INFO, " DmaAbove4G: %s\n", Bridge->DmaAbove4G ? L"Yes" :
L"No"));
- DEBUG ((EFI_D_INFO, " AllocAttr: %lx (%s%s)\n",
Bridge->AllocationAttributes,
+ DEBUG ((EFI_D_INFO, " Support/Attr: %lx / %lx\n", Bridge->Supports,
Bridge->Attributes));
+ DEBUG ((EFI_D_INFO, " DmaAbove4G: %s\n", Bridge->DmaAbove4G ? L"Yes" :
L"No"));
+ DEBUG ((EFI_D_INFO, " AllocAttr: %lx (%s%s)\n",
Bridge->AllocationAttributes,
(Bridge->AllocationAttributes &
EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) != 0 ? L"CombineMemPMem " : L"",
(Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_MEM64_DECODE) !=
0 ? L"Mem64Decode" : L""
));
- DEBUG ((EFI_D_INFO, " Bus: %lx - %lx\n", Bridge->Bus.Base,
Bridge->Bus.Limit));
- DEBUG ((EFI_D_INFO, " Io: %lx - %lx\n", Bridge->Io.Base,
Bridge->Io.Limit));
- DEBUG ((EFI_D_INFO, " Mem: %lx - %lx\n", Bridge->Mem.Base,
Bridge->Mem.Limit));
- DEBUG ((EFI_D_INFO, " MemAbove4G: %lx - %lx\n", Bridge->MemAbove4G.Base,
Bridge->MemAbove4G.Limit));
- DEBUG ((EFI_D_INFO, " PMem: %lx - %lx\n", Bridge->PMem.Base,
Bridge->PMem.Limit));
- DEBUG ((EFI_D_INFO, " PMemAbove4G: %lx - %lx\n", Bridge->PMemAbove4G.Base,
Bridge->PMemAbove4G.Limit));
+ DEBUG ((EFI_D_INFO, " Bus: %lx - %lx\n", Bridge->Bus.Base,
Bridge->Bus.Limit));
+ DEBUG ((EFI_D_INFO, " Io: %lx - %lx\n", Bridge->Io.Base,
Bridge->Io.Limit));
+ DEBUG ((EFI_D_INFO, " Mem: %lx - %lx\n", Bridge->Mem.Base,
Bridge->Mem.Limit));
+ DEBUG ((EFI_D_INFO, " MemAbove4G: %lx - %lx\n", Bridge->MemAbove4G.Base,
Bridge->MemAbove4G.Limit));
+ DEBUG ((EFI_D_INFO, " PMem: %lx - %lx\n", Bridge->PMem.Base,
Bridge->PMem.Limit));
+ DEBUG ((EFI_D_INFO, " PMemAbove4G: %lx - %lx\n", Bridge->PMemAbove4G.Base,
Bridge->PMemAbove4G.Limit));
//
// Make sure Mem and MemAbove4G apertures are valid
--
1.8.3.1
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