On 03/01/16 20:23, Jordan Justen wrote: > On 2016-02-26 16:23:33, Laszlo Ersek wrote: >> In "OvmfPkg/PciHostBridgeDxe/PciRootBridgeIo.c", the >> RootBridgeIoCheckParameter() function hard-codes them as [0x00..0xFF] (see >> the MAX_PCI_REG_ADDRESS macro), which matches OVMF's 0xCF8 / 0xCFC config >> access method. >> >> The "MdeModulePkg/Bus/Pci/PciHostBridgeDxe" driver abstracts away config >> space access via the PciSegmentLib class, so it has to be informed >> separately about the config space boundaries. >> >> Cc: Jordan Justen <jordan.l.jus...@intel.com> >> Cc: Ruiyu Ni <ruiyu...@intel.com> >> Cc: Marcel Apfelbaum <mar...@redhat.com> >> Contributed-under: TianoCore Contribution Agreement 1.0 >> Signed-off-by: Laszlo Ersek <ler...@redhat.com> >> --- >> OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c >> b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c >> index 07f7048f8d29..e045442ecad0 100644 >> --- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c >> +++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c >> @@ -103,6 +103,9 @@ InitRootBridge ( >> RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) + >> (PcdGet64 (PcdPciMmio32Size) - 1); >> >> + RootBus->Pci.Base = 0x00; >> + RootBus->Pci.Limit = 0xFF; > > I guess you might consider PCI_MAX_BUS.
This patch will change (matching the evolution of the PciHostBridgeDxe patch), and 0xFF will disappear here. However, while addressing your PCI_MAX_DEVICE comment for patch 7, I noticed PCI_MAX_BUS myself in "MdePkg/Include/IndustryStandard/Pci22.h". So I've already put that macro too to use in that patch. Thanks Laszlo > >> + >> return EFI_OUT_OF_RESOURCES; >> } >> >> -- >> 1.8.3.1 >> >> _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
