We should store the right value to the PMBA (if the PMBA needs initialization) before setting mAcpiTimerIoAddr from the PMBA.
Cc: Gabriel Somlo <[email protected]> Cc: Jordan Justen <[email protected]> Fixes: f122712b42af3d63902c2c141e90d2c200df6790 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <[email protected]> --- Notes: v2: - new in v2 OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c index c3c50c05d31e..7144d75c7325 100644 --- a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c +++ b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c @@ -58,34 +58,33 @@ AcpiTimerLibConstructor ( break; default: DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n", __FUNCTION__, HostBridgeDevId)); ASSERT (FALSE); return RETURN_UNSUPPORTED; } - mAcpiTimerIoAddr = (PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET; - // // Check to see if the Power Management Base Address is already enabled // if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) { // // If the Power Management Base Address is not programmed, // then program the Power Management Base Address from a PCD. // PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress)); // // Enable PMBA I/O port decodes // PciOr8 (AcpiCtlReg, AcpiEnBit); } + mAcpiTimerIoAddr = (PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET; return RETURN_SUCCESS; } /** Internal function to read the current tick counter of ACPI. Read the current ACPI tick counter using the counter address cached by this instance's constructor. -- 1.8.3.1 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
