Sorry, Macrin. Could you explain more about this fix? According to AHCI spec, " When PxCMD.FRE is set (causing PxCMD.FR to be set to ‘1’), the HBA receives FISes from the device and copies them into system memory. "
The lines you removed in the patch is waiting for PxCMD.FR to be set to 1 rather than to be clear to 0. So is the patch commit log correct? Last, what's the side effect even though we check the FR bit value with 1? Thanks Feng -----Original Message----- From: edk2-devel [mailto:[email protected]] On Behalf Of Marcin Wojtas Sent: Tuesday, June 21, 2016 8:37 AM To: [email protected] Cc: [email protected]; [email protected]; [email protected]; Gao, Liming <[email protected]>; Kinney, Michael D <[email protected]> Subject: [edk2] [PATCH] MdedulePkg: AtaAtapiPassThru: Remove polling on PxCMD.FR flag setting From: Jan Dąbroś <[email protected]> It is enough to set PxCMD.FRE bit, which cause HBA to post received FISes into the FIS receive area. According to AHCI Specification, only polling on PxCMD.FRE to be cleared is necessary, when it is needeed to stop FIS engine (eg. in order to change PxCMD.FB address). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jan Dabros <[email protected]> Signed-off-by: Marcin Wojtas <[email protected]> --- MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-) diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c index 3534d9f..469a40a 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c @@ -427,13 +427,7 @@ AhciEnableFisReceive ( Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD; AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE); - return AhciWaitMmioSet ( - PciIo, - Offset, - EFI_AHCI_PORT_CMD_FR, - EFI_AHCI_PORT_CMD_FR, - Timeout - ); + return EFI_SUCCESS; } /** @@ -2344,16 +2338,6 @@ AhciModeInitialization ( // Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD; AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE); - Status = AhciWaitMmioSet ( - PciIo, - Offset, - EFI_AHCI_PORT_CMD_FR, - EFI_AHCI_PORT_CMD_FR, - EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT - ); - if (EFI_ERROR (Status)) { - continue; - } // // Wait no longer than 10 ms to wait the Phy to detect the presence of a device. -- 1.8.3.1 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
