On 17 June 2016 at 12:32, Leif Lindholm <[email protected]> wrote:
> On Thu, Jun 16, 2016 at 12:29:30PM +0200, Ard Biesheuvel wrote:
>> This introduces a special version of ArmMmuLib for PEIMs that takes care
>> only to perform cache maintenance on the live entry replacement routine
>> if the module is not executing in place. Not only is such cache maintenance
>> unnecessary in that case, it may be actively harmful on some systems that
>> fail to tolerate cache maintenance operations on NOR flash regions.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <[email protected]>
>> ---
>>  ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c | 60 
>> ++++++++++++++++++++
>>  ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf                  | 36 ++++++++++++
>>  2 files changed, 96 insertions(+)
>>
>> diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c 
>> b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c
>> new file mode 100644
>> index 000000000000..91dc1157e79a
>> --- /dev/null
>> +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c
>> @@ -0,0 +1,60 @@
>> +#/* @file
>> +#
>> +#  Copyright (c) 2016, Linaro Limited. All rights reserved.
>> +#
>> +#  This program and the accompanying materials
>> +#  are licensed and made available under the terms and conditions of the 
>> BSD License
>> +#  which accompanies this distribution.  The full text of the license may 
>> be found at
>> +#  http://opensource.org/licenses/bsd-license.php
>> +#
>> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
>> IMPLIED.
>> +#
>> +#*/
>> +
>> +#include <Base.h>
>> +
>> +#include <Library/ArmLib.h>
>> +#include <Library/ArmMmuLib.h>
>> +#include <Library/CacheMaintenanceLib.h>
>> +#include <Library/DebugLib.h>
>> +
>> +EFI_STATUS
>> +EFIAPI
>> +ArmMmuPeiLibConstructor (
>> +  IN       EFI_PEI_FILE_HANDLE       FileHandle,
>> +  IN CONST EFI_PEI_SERVICES          **PeiServices
>> +  )
>> +{
>> +  extern UINT32             ArmReplaceLiveTranslationEntrySize;
>> +
>> +  EFI_FV_FILE_INFO          FileInfo;
>> +  EFI_STATUS                Status;
>> +
>> +  ASSERT (FileHandle != NULL);
>> +
>> +  Status = (*PeiServices)->FfsGetFileInfo (FileHandle, &FileInfo);
>> +  ASSERT_EFI_ERROR (Status);
>> +
>> +  //
>> +  // Some platforms do not cope very well with cache maintenance being
>> +  // performed on regions backed by NOR flash. Since the cache maintenance
>> +  // is unnecessary to begin with in that case, perform it only when not
>> +  // executing in place.
>> +  //
>
> I think perhaps the wording of the above is confusing me a little bit;
> the thing that makes it not matter is that it is executing in place,
> not that it is backed by NOR, right? Could the statement be flipped?:
>

Actually, a bit of both. But even when we are executing PEI from DRAM,
we should be able to assume that it is clean to the PoC since it is
entered with the MMU off. So that is why the heuristic is based on XIP
rather than whether it is backed by NOR, since the latter is
impossible to detect.

> "Perform it only when not executing in place, since otherwise the
> cache maintenance is unnecessary."
>
> Someone who is less fond of multiple negations in a singe sentence
> than me may prefer to reword it further...
>

How about

"""
Since the firmware image can be assumed to be clean to the PoC when
running XIP, even when PEI is executing from DRAM, we only need to
perform the cache maintenance when not executing in place.
"""
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