Hi,
I have two comments for this patch:
(1) Could you describe what's the purpose of below change? If it's for another
bug fix, we need to submit it in a separate patch.
- MmioWrite32 (MmioConf0, 0x2003CC00);
+ MmioWrite32 (MmioConf0, 0x2003CD00);
(2) For SF_DEVICE_ID0_W25QXX, we do have a flash with ID 0x40. So we need to
keep 0x40. The proper way is to add another definition and more code for 0x60.
Thanks,
David Wei
Intel SSG BIOS Team
-----Original Message-----
From: edk2-devel [mailto:[email protected]] On Behalf Of Anteja
Vuk Macek
Sent: Thursday, June 23, 2016 1:50 PM
To: edk2-devel(email list) <[email protected]>
Subject: [edk2] [PATCH] Vlv2TbltDevicePkg: Change value for Winboard W25QXX and
change register value in DetermineTurbotBoard ()
Hi,
Working with MinnowBoard Max, I run on errors. There is patch with correct
values.
Index: Vlv2TbltDevicePkg/Include/Library/SpiFlash.H
===================================================================
--- Vlv2TbltDevicePkg/Include/Library/SpiFlash.H (revision 1319)
+++ Vlv2TbltDevicePkg/Include/Library/SpiFlash.H (working copy)
@@ -75,7 +75,7 @@
#define SF_DEVICE_ID0_W25XXX 0x30
#define SF_DEVICE_ID1_W25X32 0x16
#define SF_DEVICE_ID1_W25X64 0x17
-#define SF_DEVICE_ID0_W25QXX 0x40
+#define SF_DEVICE_ID0_W25QXX 0x60//0x40
#define SF_DEVICE_ID1_W25Q16 0x15
#define SF_DEVICE_ID1_W25Q32 0x16
#define SF_DEVICE_ID1_W25Q64 0x17
Index: Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c
===================================================================
--- Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c (revision
1319)
+++ Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c (working
copy)
@@ -168,7 +168,7 @@
UINT32 SSUSOffset = 0x2000;
UINT32 IoBase = 0;
- DEBUG ((EFI_D_ERROR, "DetermineTurbotBoard() Entry\n"));
+ DEBUG ((EFI_D_ERROR, "DetectTurbotBoard() Entry\n"));
PciD31F0RegBase = MmPciAddress (0,
0,
PCI_DEVICE_NUMBER_PCH_LPC,
@@ -182,7 +182,7 @@
//0xFED0E200/0xFED0E208 is pad_Conf/pad_val register address of GPIO_S5_4
DEBUG ((EFI_D_ERROR, "MmioConf0[0x%x], MmioPadval[0x%x]\n", MmioConf0,
MmioPadval));
- MmioWrite32 (MmioConf0, 0x2003CC00);
+ MmioWrite32 (MmioConf0, 0x2003CD00);
TmpVal = MmioRead32 (MmioPadval);
TmpVal &= ~0x6; //Clear bit 1:2
Index: Vlv2TbltDevicePkg/PlatformPei/Platform.c
===================================================================
--- Vlv2TbltDevicePkg/PlatformPei/Platform.c (revision 1319)
+++ Vlv2TbltDevicePkg/PlatformPei/Platform.c (working copy)
@@ -238,7 +238,7 @@
//0xFED0E200/0xFED0E208 is pad_Conf/pad_val register address of GPIO_S5_4
DEBUG ((EFI_D_ERROR, "MmioConf0[0x%x], MmioPadval[0x%x]\n", MmioConf0,
MmioPadval));
- MmioWrite32 (MmioConf0, 0x2003CC00);
+ MmioWrite32 (MmioConf0, 0x2003CD00);
TmpVal = MmioRead32 (MmioPadval);
TmpVal &= ~0x6; //Clear bit 1:2
Best regards,
AntejaVM
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