Keep NASM file only for new added modules. Cc: Jiewen Yao <[email protected]> Cc: Giri Mudusuru <[email protected]> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <[email protected]> --- .../BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf | 2 - .../Library/BaseFspWrapperApiLib/X64/Thunk64To32.S | 230 --------------------- .../BaseFspWrapperApiLib/X64/Thunk64To32.asm | 230 --------------------- 3 files changed, 462 deletions(-) delete mode 100644 IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.S delete mode 100644 IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.asm
diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf index f2cef05..b52cfeb 100644 --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf @@ -43,12 +43,10 @@ [Sources.IA32] IA32/DispatchExecute.c [Sources.X64] X64/DispatchExecute.c - X64/Thunk64To32.asm - X64/Thunk64To32.S X64/Thunk64To32.nasm ################################################################################ # # Package Dependency Section - list of Package files that are required for diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.S b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.S deleted file mode 100644 index b6b5c1a..0000000 --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.S +++ /dev/null @@ -1,230 +0,0 @@ -# -# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR> -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php. -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# -# Module Name: -# -# Thunk64To32.asm -# -# Abstract: -# -# This is the assembly code to transition from long mode to compatibility mode to execute 32-bit code and then -# transit back to long mode. -# -#------------------------------------------------------------------------------- - -#---------------------------------------------------------------------------- -# Procedure: AsmExecute32BitCode -# -# Input: None -# -# Output: None -# -# Prototype: UINT32 -# AsmExecute32BitCode ( -# IN UINT64 Function, -# IN UINT64 Param1, -# IN UINT64 Param2, -# IN IA32_DESCRIPTOR *InternalGdtr -# ); -# -# -# Description: A thunk function to execute 32-bit code in long mode. -# -#---------------------------------------------------------------------------- - -ASM_GLOBAL ASM_PFX(AsmExecute32BitCode) -ASM_PFX(AsmExecute32BitCode): - # - # save IFLAG and disable it - # - pushfq - cli - - # - # save orignal GDTR and CS - # - movl %ds, %eax - push %rax - movl %cs, %eax - push %rax - subq $0x10, %rsp - sgdt (%rsp) - # - # load internal GDT - # - lgdt (%r9) - # - # Save general purpose register and rflag register - # - pushfq - push %rdi - push %rsi - push %rbp - push %rbx - - # - # save CR3 - # - movq %cr3, %rax - movq %rax, %rbp - - # - # Prepare the CS and return address for the transition from 32-bit to 64-bit mode - # - movq $0x10, %rax # load long mode selector - shl $32, %rax - lea ReloadCS(%rip), %r9 #Assume the ReloadCS is under 4G - orq %r9, %rax - push %rax - # - # Save parameters for 32-bit function call - # - movq %r8, %rax - shl $32, %rax - orq %rdx, %rax - push %rax - # - # save the 32-bit function entry and the return address into stack which will be - # retrieve in compatibility mode. - # - lea ReturnBack(%rip), %rax #Assume the ReloadCS is under 4G - shl $32, %rax - orq %rcx, %rax - push %rax - - # - # let rax save DS - # - movq $0x18, %rax - - # - # Change to Compatible Segment - # - movq $8, %rcx # load compatible mode selector - shl $32, %rcx - lea Compatible(%rip), %rdx # assume address < 4G - orq %rdx, %rcx - push %rcx - .byte 0xcb # retf - -Compatible: - # reload DS/ES/SS to make sure they are correct referred to current GDT - movw %ax, %ds - movw %ax, %es - movw %ax, %ss - - # - # Disable paging - # - movq %cr0, %rcx - btc $31, %ecx - movq %rcx, %cr0 - # - # Clear EFER.LME - # - movl $0xC0000080, %ecx - rdmsr - btc $8, %eax - wrmsr - -# Now we are in protected mode - # - # Call 32-bit function. Assume the function entry address and parameter value is less than 4G - # - pop %rax # Here is the function entry - # - # Now the parameter is at the bottom of the stack, then call in to IA32 function. - # - jmp *%rax -ReturnBack: - movl %eax, %ebx # save return status - pop %rcx # drop param1 - pop %rcx # drop param2 - - # - # restore CR4 - # - movq %cr4, %rax - bts $5, %eax - movq %rax, %cr4 - - # - # restore CR3 - # - movl %ebp, %eax - movq %rax, %cr3 - - # - # Set EFER.LME to re-enable ia32-e - # - movl $0xC0000080, %ecx - rdmsr - bts $8, %eax - wrmsr - # - # Enable paging - # - movq %cr0, %rax - bts $31, %eax - mov %rax, %cr0 -# Now we are in compatible mode - - # - # Reload cs register - # - .byte 0xcb # retf -ReloadCS: - # - # Now we're in Long Mode - # - # - # Restore C register and eax hold the return status from 32-bit function. - # Note: Do not touch rax from now which hold the return value from IA32 function - # - movl %ebx, %eax # put return status to EAX - pop %rbx - pop %rbp - pop %rsi - pop %rdi - popfq - # - # Switch to orignal GDT and CS. here rsp is pointer to the orignal GDT descriptor. - # - lgdt (%rsp) - # - # drop GDT descriptor in stack - # - addq $0x10, %rsp - # - # switch to orignal CS and GDTR - # - pop %r9 # get CS - shl $32, %r9 # rcx[32..47] <- Cs - lea ReturnToLongMode(%rip), %rcx - orq %r9, %rcx - push %rcx - .byte 0xcb # retf -ReturnToLongMode: - # - # Reload original DS/ES/SS - # - pop %rcx - movl %ecx, %ds - movl %ecx, %es - movl %ecx, %ss - - # - # Restore IFLAG - # - popfq - - ret - diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.asm b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.asm deleted file mode 100644 index 70e7b5f..0000000 --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.asm +++ /dev/null @@ -1,230 +0,0 @@ -; -; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR> -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -; -; Module Name: -; -; Thunk64To32.asm -; -; Abstract: -; -; This is the assembly code to transition from long mode to compatibility mode to execute 32-bit code and then -; transit back to long mode. -; -;------------------------------------------------------------------------------- - .code -;---------------------------------------------------------------------------- -; Procedure: AsmExecute32BitCode -; -; Input: None -; -; Output: None -; -; Prototype: UINT32 -; AsmExecute32BitCode ( -; IN UINT64 Function, -; IN UINT64 Param1, -; IN UINT64 Param2, -; IN IA32_DESCRIPTOR *InternalGdtr -; ); -; -; -; Description: A thunk function to execute 32-bit code in long mode. -; -;---------------------------------------------------------------------------- -AsmExecute32BitCode PROC - ; - ; save IFLAG and disable it - ; - pushfq - cli - - ; - ; save orignal GDTR and CS - ; - mov rax, ds - push rax - mov rax, cs - push rax - sub rsp, 10h - sgdt fword ptr [rsp] - ; - ; load internal GDT - ; - lgdt fword ptr [r9] - ; - ; Save general purpose register and rflag register - ; - pushfq - push rdi - push rsi - push rbp - push rbx - - ; - ; save CR3 - ; - mov rax, cr3 - mov rbp, rax - - ; - ; Prepare the CS and return address for the transition from 32-bit to 64-bit mode - ; - mov rax, 10h ; load long mode selector - shl rax, 32 - mov r9, OFFSET ReloadCS ;Assume the ReloadCS is under 4G - or rax, r9 - push rax - ; - ; Save parameters for 32-bit function call - ; - mov rax, r8 - shl rax, 32 - or rax, rdx - push rax - ; - ; save the 32-bit function entry and the return address into stack which will be - ; retrieve in compatibility mode. - ; - mov rax, OFFSET ReturnBack ;Assume the ReloadCS is under 4G - shl rax, 32 - or rax, rcx - push rax - - ; - ; let rax save DS - ; - mov rax, 018h - - ; - ; Change to Compatible Segment - ; - mov rcx, 08h ; load compatible mode selector - shl rcx, 32 - mov rdx, OFFSET Compatible ; assume address < 4G - or rcx, rdx - push rcx - retf - -Compatible: - ; reload DS/ES/SS to make sure they are correct referred to current GDT - mov ds, ax - mov es, ax - mov ss, ax - - ; - ; Disable paging - ; - mov rcx, cr0 - btc ecx, 31 - mov cr0, rcx - ; - ; Clear EFER.LME - ; - mov ecx, 0C0000080h - rdmsr - btc eax, 8 - wrmsr - -; Now we are in protected mode - ; - ; Call 32-bit function. Assume the function entry address and parameter value is less than 4G - ; - pop rax ; Here is the function entry - ; - ; Now the parameter is at the bottom of the stack, then call in to IA32 function. - ; - jmp rax -ReturnBack: - mov ebx, eax ; save return status - pop rcx ; drop param1 - pop rcx ; drop param2 - - ; - ; restore CR4 - ; - mov rax, cr4 - bts eax, 5 - mov cr4, rax - - ; - ; restore CR3 - ; - mov eax, ebp - mov cr3, rax - - ; - ; Set EFER.LME to re-enable ia32-e - ; - mov ecx, 0C0000080h - rdmsr - bts eax, 8 - wrmsr - ; - ; Enable paging - ; - mov rax, cr0 - bts eax, 31 - mov cr0, rax -; Now we are in compatible mode - - ; - ; Reload cs register - ; - retf -ReloadCS: - ; - ; Now we're in Long Mode - ; - ; - ; Restore C register and eax hold the return status from 32-bit function. - ; Note: Do not touch rax from now which hold the return value from IA32 function - ; - mov eax, ebx ; put return status to EAX - pop rbx - pop rbp - pop rsi - pop rdi - popfq - ; - ; Switch to orignal GDT and CS. here rsp is pointer to the orignal GDT descriptor. - ; - lgdt fword ptr[rsp] - ; - ; drop GDT descriptor in stack - ; - add rsp, 10h - ; - ; switch to orignal CS and GDTR - ; - pop r9 ; get CS - shl r9, 32 ; rcx[32..47] <- Cs - mov rcx, OFFSET @F - or rcx, r9 - push rcx - retf -@@: - ; - ; Reload original DS/ES/SS - ; - pop rcx - mov ds, rcx - mov es, rcx - mov ss, rcx - - ; - ; Restore IFLAG - ; - popfq - - ret -AsmExecute32BitCode ENDP - - END -- 1.9.5.msysgit.0 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
