在 07/21/2016 09:51 AM, Haojian Zhuang 写道:
Hi Feng, I think the main difference is who to handle the CRC bits. In the designware emmc/sd controller, the whole 128-bit value is loaded into the four response registers. There's no any shift on the 128-bit value to remove CRC. (Refer to: drivers/mmc/host/dw_mmc.c).
I mean the implementation in linux. $Linux/drivers/mmc/host/dw_mmc.c
In the eMMC spec, it only mentions R2 response in table. Bit position [127:1] Width (bits) 127 Value x Description CID or CSD register incl. internal CRC7 It also doesn't mention that we need to shift response value for CSD register. So I did this fixing patch. I think that shifting isn't common to support all eMMC/SD controller IP. Without this patch, the eMMC stack will only get shifted CSD register value. It results in parse error. Best Regards Haojian 在 07/20/2016 04:14 PM, Tian, Feng 写道:Correct my words, According to SD host controller spec, the CRC field is ignored by h/c. user could only get the data between bit8 and bit127. Kind of Response | Meaning of Response | ResponseField | ResponseRegister ------------------------------------------------------------------------------------------------------------------------------ R2 (CID, CSD register) | CID or CSD reg. incl. | R [127:8] | REP [119:0] So I don't think your fix is correct. Please correct me if I misunderstand. Thanks Feng -----Original Message----- From: Tian, Feng Sent: Wednesday, July 20, 2016 10:13 AM To: Haojian Zhuang <[email protected]> Cc: [email protected]; [email protected]; [email protected]; [email protected]; Tian, Feng <[email protected]> Subject: RE: [edk2] [PATCH] EmmcBlockIo: fix to get CSD data Hi, Haojian Why I didn't get the lowest byte data is because it's CRC field. I thought nobody will care about it. My assumption is incorrect for your usage model? Thanks Feng -----Original Message----- From: edk2-devel [mailto:[email protected]] On Behalf Of Haojian Zhuang Sent: Tuesday, July 19, 2016 3:38 PM To: Tian, Feng <[email protected]> Cc: Haojian Zhuang <[email protected]>; [email protected]; [email protected]; [email protected]; [email protected] Subject: [edk2] [PATCH] EmmcBlockIo: fix to get CSD data The CSD structure is a 128-bit structure. But EmmcGetCsd() only loads 120 bits with 8-bit offset. Now fix it. Signed-off-by: Haojian Zhuang <[email protected]> --- MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.c b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.c index fc705e1..fe85627 100644 --- a/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.c +++ b/MdeModulePkg/Bus/Sd/EmmcDxe/EmmcBlockIo.c @@ -191,9 +191,9 @@ EmmcGetCsd ( Status = PassThru->PassThru (PassThru, Device->Slot, &Packet, NULL); if (!EFI_ERROR (Status)) { // - // For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12. + // Copy 128bit data for CSD structure. // - CopyMem (((UINT8*)Csd) + 1, &SdMmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1); + CopyMem ((VOID*)Csd, &SdMmcStatusBlk.Resp0, sizeof (EMMC_CSD)); } return Status;
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