Commit b89919ee8f8c ("BaseTools AARCH64: override XIP module linker
alignment to 32 bytes") updated the various AARCH64 toolchain definitions
to allow SEC, PEI_CORE and PEIM modules to be built with minimal alignment
requirements even when using the AArch64 small code model which normally
requires 4 KB section alignment.

This involves conversion of ADRP instructions into ADR instructions, which
can only be done reliably if the ELF and the PE/COFF sections appear at
the same offset modulo 4 KB.

The ArmVirtPrePiUniCoreRelocatable linker script did not yet take this
into account, so update it by starting the .text section at the next
appropriately aligned offset PECOFF_HEADER_SIZE bytes into the image.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <[email protected]>
---

This fixes the ArmVirtQemuKernel and ArmVirtXen platforms, which are currently
broken when using DEBUG_GCC49, DEBUG_GCC5 or *_CLANG35 (all of which received
the linker alignment treatment mentioned above)

Symptoms: many occurrences of
...
GenFw: ERROR 3000: Invalid
  WriteSections64(): <../ArmVirtPrePiUniCoreRelocatable.dll> AARCH64 small
     code model requires identical ELF and PE/COFF section offsets modulo 4 KB.
...

and a failed build.

 ArmVirtPkg/PrePi/Scripts/PrePi-PIE.lds | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/PrePi/Scripts/PrePi-PIE.lds 
b/ArmVirtPkg/PrePi/Scripts/PrePi-PIE.lds
index 44df7840adfd..492a8fff380f 100644
--- a/ArmVirtPkg/PrePi/Scripts/PrePi-PIE.lds
+++ b/ArmVirtPkg/PrePi/Scripts/PrePi-PIE.lds
@@ -14,9 +14,10 @@
 
 SECTIONS
 {
-  .text 0x0 : ALIGN(CONSTANT(COMMONPAGESIZE)) {
-    PROVIDE(__reloc_base = .);
+  PROVIDE(__reloc_base = .);
 
+  . = PECOFF_HEADER_SIZE;
+  .text : ALIGN(CONSTANT(COMMONPAGESIZE)) {
     *(.text .text*)
     *(.got .got*)
     *(.rodata .rodata*)
-- 
2.7.4

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