Since All the GIC base address variables now are 64-bit, given
that a UNIT64 var cannot exceed MAX_UNIT64, it doesn't make sense
to continue keep them in the codes, so this patch just simply drop
those ASSERT() statements as it should be.

Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
Cc: Leif Lindholm <leif.lindh...@linaro.org>
Cc: Laszlo Ersek <ler...@redhat.com>
Signed-off-by: Dennis Chen <dennis.c...@arm.com>
---
 ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c 
b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
index 64afc4d..7a312e5 100644
--- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
+++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
@@ -79,11 +79,9 @@ ArmVirtGicArchLibConstructor (
 
     // RegProp[0..1] == { GICD base, GICD size }
     DistBase = SwapBytes64 (Reg[0]);
-    ASSERT (DistBase < MAX_UINT32);
 
     // RegProp[2..3] == { GICR base, GICR size }
     RedistBase = SwapBytes64 (Reg[2]);
-    ASSERT (RedistBase < MAX_UINT32);
 
     PcdSet64 (PcdGicDistributorBase, DistBase);
     PcdSet64 (PcdGicRedistributorsBase, RedistBase);
@@ -117,8 +115,6 @@ ArmVirtGicArchLibConstructor (
 
     DistBase = SwapBytes64 (Reg[0]);
     CpuBase  = SwapBytes64 (Reg[2]);
-    ASSERT (DistBase < MAX_UINT32);
-    ASSERT (CpuBase < MAX_UINT32);
 
     PcdSet64 (PcdGicDistributorBase, DistBase);
     PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase);
-- 
2.7.4

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