Reviewed-by: Giri P Mudusuru <[email protected]> > -----Original Message----- > From: Yarlagadda, Satya P > Sent: Thursday, October 20, 2016 10:49 PM > To: [email protected] > Cc: Ma, Maurice <[email protected]>; Yao, Jiewen > <[email protected]>; Mudusuru, Giri P <[email protected]> > Subject: [PATCH] IntelFsp2Pkg: Added changes to enable FPDT performance > measurements > > IntelFsp2Pkg: > 1.Defined performance measure mask to mask the Perf id (Bits 63:56) of the > Perf Data from FSP Global data. > 2.Replaced the hard coded perf ids to use the standard defines > from FspStatuscode.h > 3.Add the PerfData form Fsp Global data ( for TempRaminit entry, > TempramInit exit, memoryinit entry) to FPDT entries > > IntelFsp2WrapperPkg: > Moved the code to add the FSP FPDT records and wrapper FPDT records > from ReadytoBoot event to EndofFirmware event > > Cc: Maurice Ma <[email protected]> > Cc: Jiewen Yao <[email protected]> > Cc: Giri P Mudusuru <[email protected]> > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Satya Yarlagadda <[email protected]> > --- > IntelFsp2Pkg/Include/FspGlobalData.h | 1 + > .../BaseFspPlatformLib/BaseFspPlatformLib.inf | 4 ++ > .../Library/BaseFspPlatformLib/FspPlatformNotify.c | 33 +++++++++---- > .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.c | 55 +++++++++++---------- > - > .../FspmWrapperPeim/FspmWrapperPeim.c | 5 +- > .../FspsWrapperPeim/FspsWrapperPeim.c | 5 +- > 6 files changed, 61 insertions(+), 42 deletions(-) > > diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h > b/IntelFsp2Pkg/Include/FspGlobalData.h > index 8ac3199..7de2660 100644 > --- a/IntelFsp2Pkg/Include/FspGlobalData.h > +++ b/IntelFsp2Pkg/Include/FspGlobalData.h > @@ -38,6 +38,7 @@ typedef struct { > > #define FSP_GLOBAL_DATA_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'D') > #define FSP_PERFORMANCE_DATA_SIGNATURE SIGNATURE_32 ('P', 'E', 'R', 'F') > +#define FSP_PERFORMANCE_DATA_TIMER_MASK 0xFFFFFFFFFFFFFF > > typedef struct { > UINT32 Signature; > diff --git a/IntelFsp2Pkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf > b/IntelFsp2Pkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf > index d04689e..907482d 100644 > --- a/IntelFsp2Pkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf > +++ b/IntelFsp2Pkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf > @@ -44,6 +44,10 @@ > [Guids] > gFspPerformanceDataGuid ## CONSUMES ## > GUID > gFspEventEndOfFirmwareGuid ## PRODUCES ## > GUID > + gEfiEventReadyToBootGuid ## CONSUMES ## > Event > + > +[Protocols] > + gEfiPciEnumerationCompleteProtocolGuid ## CONSUMES > > [FixedPcd] > gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES > diff --git a/IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformNotify.c > b/IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformNotify.c > index 66b6cdb..755e84f 100644 > --- a/IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformNotify.c > +++ b/IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformNotify.c > @@ -121,15 +121,12 @@ FspSiliconInitDone ( > // > SetFspMeasurePoint (FSP_PERF_ID_API_FSP_SILICON_INIT_EXIT); > DEBUG ((DEBUG_INFO | DEBUG_INIT, "FspSiliconInitApi() - End\n")); > - > - PERF_END_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, 0x907F); > - > + PERF_END_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_EXIT); > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); > SetFspApiReturnStatus (EFI_SUCCESS); > > Pei2LoaderSwitchStack(); > > - PERF_START_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, 0x6000); > } > > /** > @@ -143,6 +140,7 @@ FspMemoryInitDone ( > IN OUT VOID **HobListPtr > ) > { > + FSP_GLOBAL_DATA *FspData; > // > // Calling use FspMemoryInit API > // Update HOB and return the control directly > @@ -155,8 +153,13 @@ FspMemoryInitDone ( > // This is the end of the FspMemoryInit API > // Give control back to the boot loader > // > - SetFspMeasurePoint (FSP_PERF_ID_API_FSP_MEMORY_INIT_EXIT); > DEBUG ((DEBUG_INFO | DEBUG_INIT, "FspMemoryInitApi() - End\n")); > + SetFspMeasurePoint (FSP_PERF_ID_API_FSP_MEMORY_INIT_EXIT); > + FspData = GetFspGlobalDataPointer (); > + PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, (FspData- > >PerfData[0] & FSP_PERFORMANCE_DATA_TIMER_MASK), > FSP_STATUS_CODE_TEMP_RAM_INIT | FSP_STATUS_CODE_COMMON_CODE| > FSP_STATUS_CODE_API_ENTRY); > + PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, (FspData- > >PerfData[1] & FSP_PERFORMANCE_DATA_TIMER_MASK), > FSP_STATUS_CODE_TEMP_RAM_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_EXIT); > + PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, (FspData- > >PerfData[2] & FSP_PERFORMANCE_DATA_TIMER_MASK), > FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_ENTRY); > + PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_EXIT); > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_EXIT); > SetFspApiReturnStatus (EFI_SUCCESS); > Pei2LoaderSwitchStack (); > @@ -166,14 +169,16 @@ FspMemoryInitDone ( > // > if (GetFspApiCallingIndex () == TempRamExitApiIndex) { > SetPhaseStatusCode (FSP_STATUS_CODE_TEMP_RAM_EXIT); > - REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_ENTRY); > SetFspMeasurePoint (FSP_PERF_ID_API_TEMP_RAM_EXIT_ENTRY); > + PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_ENTRY); > + REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_ENTRY); > DEBUG ((DEBUG_INFO | DEBUG_INIT, "TempRamExitApi() - Begin\n")); > } else { > - SetFspMeasurePoint (FSP_PERF_ID_API_FSP_SILICON_INIT_ENTRY); > - DEBUG ((DEBUG_INFO | DEBUG_INIT, "FspSiliconInitApi() - Begin\n")); > SetPhaseStatusCode (FSP_STATUS_CODE_SILICON_INIT); > + SetFspMeasurePoint (FSP_PERF_ID_API_FSP_SILICON_INIT_ENTRY); > + PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_ENTRY); > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_ENTRY); > + DEBUG ((DEBUG_INFO | DEBUG_INIT, "FspSiliconInitApi() - Begin\n")); > } > } > > @@ -192,16 +197,18 @@ FspTempRamExitDone ( > // This is the end of the TempRamExit API > // Give control back to the boot loader > // > - SetFspMeasurePoint (FSP_PERF_ID_API_TEMP_RAM_EXIT_EXIT); > DEBUG ((DEBUG_INFO | DEBUG_INIT, "TempRamExitApi() - End\n")); > + SetFspMeasurePoint (FSP_PERF_ID_API_TEMP_RAM_EXIT_EXIT); > + PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_EXIT); > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_EXIT); > SetFspApiReturnStatus (EFI_SUCCESS); > Pei2LoaderSwitchStack (); > > SetPhaseStatusCode (FSP_STATUS_CODE_SILICON_INIT); > SetFspMeasurePoint (FSP_PERF_ID_API_FSP_SILICON_INIT_ENTRY); > - DEBUG ((DEBUG_INFO | DEBUG_INIT, "SiliconInitApi() - Begin\n")); > + PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_ENTRY); > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_ENTRY); > + DEBUG ((DEBUG_INFO | DEBUG_INIT, "SiliconInitApi() - Begin\n")); > } > > /** > @@ -229,12 +236,15 @@ FspWaitForNotify ( > > if (NotificationCount == 0) { > SetPhaseStatusCode > (FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION); > + PERF_START_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); > } else if (NotificationCount == 1) { > SetPhaseStatusCode > (FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION); > + PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); > } else if (NotificationCount == 2) { > SetPhaseStatusCode > (FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION); > + PERF_START_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); > } > > @@ -262,10 +272,13 @@ FspWaitForNotify ( > SetFspMeasurePoint (FSP_PERF_ID_API_NOTIFY_POST_PCI_EXIT + Count); > > if ((NotificationCount - 1) == 0) { > + PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); > } else if ((NotificationCount - 1) == 1) { > + PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); > } else if ((NotificationCount - 1) == 2) { > + PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); > REPORT_STATUS_CODE (EFI_PROGRESS_CODE, > FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); > } > Pei2LoaderSwitchStack(); > diff --git a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > index 0797f44..a692632 100644 > --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > +++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > @@ -25,6 +25,7 @@ > #include <Library/FspWrapperPlatformLib.h> > #include <Library/PerformanceLib.h> > #include <Library/HobLib.h> > +#include <FspStatusCode.h> > > typedef > EFI_STATUS > @@ -91,9 +92,9 @@ OnPciEnumerationComplete ( > } > > NotifyPhaseParams.Phase = EnumInitPhaseAfterPciEnumeration; > - PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x6000); > + PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); > Status = CallFspNotifyPhase (&NotifyPhaseParams); > - PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x607F); > + PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); > > // > // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status > @@ -130,16 +131,13 @@ OnReadyToBoot ( > { > NOTIFY_PHASE_PARAMS NotifyPhaseParams; > EFI_STATUS Status; > - ADD_PERFORMANCE_RECORD_PROTOCOL *AddPerfRecordInterface; > - EFI_PEI_HOB_POINTERS Hob; > - VOID **FspHobListPtr; > > gBS->CloseEvent (Event); > > NotifyPhaseParams.Phase = EnumInitPhaseReadyToBoot; > - PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x4000); > + PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); > Status = CallFspNotifyPhase (&NotifyPhaseParams); > - PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x407F); > + PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); > > // > // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status > @@ -154,23 +152,6 @@ OnReadyToBoot ( > } else { > DEBUG((DEBUG_INFO, "FSP NotifyPhase ReadyToBoot Success.\n")); > } > - > - Status = gBS->LocateProtocol ( > - &gAddPerfRecordProtocolGuid, > - NULL, > - (VOID**) &AddPerfRecordInterface > - ); > - if (EFI_ERROR (Status)) { > - DEBUG((DEBUG_INFO, "gAddPerfRecordProtocolGuid - Locate protocol > failed\n")); > - return; > - } else { > - Hob.Raw = GetHobList (); > - if (Hob.Raw != NULL) { > - Hob.Raw = GetNextGuidHob (&gFspHobGuid, Hob.Raw); > - FspHobListPtr = GET_GUID_HOB_DATA(Hob.Raw); > - AddPerfRecordInterface->AddPerformanceRecords((VOID > *)(UINTN)(((UINT32)(UINTN)*FspHobListPtr) & 0xFFFFFFFF)); > - } > - } > } > > /** > @@ -189,15 +170,18 @@ OnEndOfFirmware ( > IN VOID *Context > ) > { > - NOTIFY_PHASE_PARAMS NotifyPhaseParams; > - EFI_STATUS Status; > + NOTIFY_PHASE_PARAMS NotifyPhaseParams; > + EFI_STATUS Status; > + ADD_PERFORMANCE_RECORD_PROTOCOL *AddPerfRecordInterface; > + EFI_PEI_HOB_POINTERS Hob; > + VOID **FspHobListPtr; > > gBS->CloseEvent (Event); > > NotifyPhaseParams.Phase = EnumInitPhaseEndOfFirmware; > - PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x2000); > + PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); > Status = CallFspNotifyPhase (&NotifyPhaseParams); > - PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x207F); > + PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); > > // > // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status > @@ -212,6 +196,21 @@ OnEndOfFirmware ( > } else { > DEBUG((DEBUG_INFO, "FSP NotifyPhase EndOfFirmware Success.\n")); > } > + Status = gBS->LocateProtocol ( > + &gAddPerfRecordProtocolGuid, > + NULL, > + (VOID**) &AddPerfRecordInterface > + ); > + if (EFI_ERROR (Status)) { > + DEBUG((DEBUG_INFO, "gAddPerfRecordProtocolGuid - Locate protocol > failed\n")); > + return; > + } else { > + Hob.Raw = GetFirstGuidHob (&gFspHobGuid); > + if (Hob.Raw != NULL) { > + FspHobListPtr = GET_GUID_HOB_DATA (Hob.Raw); > + AddPerfRecordInterface->AddPerformanceRecords ((VOID > *)(UINTN)(((UINT32)(UINTN)*FspHobListPtr) & 0xFFFFFFFF)); > + } > + } > } > > /** > diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > index 0f6a7bd..f1d1cd6 100644 > --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > @@ -38,6 +38,7 @@ > #include <Ppi/SecPlatformInformation.h> > #include <Library/FspWrapperApiTestLib.h> > #include <FspEas.h> > +#include <FspStatusCode.h> > > extern EFI_GUID gFspHobGuid; > > @@ -89,8 +90,8 @@ PeiFspMemoryInit ( > TimeStampCounterStart = AsmReadTsc (); > Status = CallFspMemoryInit (FspmUpdDataPtr, &FspHobListPtr); > // Create hobs after memory initialization and not in temp RAM. Hence > passing > the recorded timestamp here > - PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, > TimeStampCounterStart, 0xD000); > - PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0xD07F); > + PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, > TimeStampCounterStart, FSP_STATUS_CODE_MEMORY_INIT | > FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); > + PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_EXIT); > DEBUG ((DEBUG_INFO, "Total time spent executing FspMemoryInitApi: %d > millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () - > TimeStampCounterStart), 1000000))); > > // > diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > index 1701b63..ddc19c7 100644 > --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > @@ -38,6 +38,7 @@ > #include <Ppi/SecPlatformInformation.h> > #include <Library/FspWrapperApiTestLib.h> > #include <FspEas.h> > +#include <FspStatusCode.h> > > extern EFI_PEI_NOTIFY_DESCRIPTOR mS3EndOfPeiNotifyDesc; > extern EFI_GUID gFspHobGuid; > @@ -253,9 +254,9 @@ PeiMemoryDiscoveredNotify ( > UpdateFspsUpdData ((VOID *)FspsUpdDataPtr); > > TimeStampCounterStart = AsmReadTsc (); > - PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x9000); > + PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_ENTRY); > Status = CallFspSiliconInit ((VOID *)FspsUpdDataPtr); > - PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0x907F); > + PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, > FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | > FSP_STATUS_CODE_API_EXIT); > DEBUG ((DEBUG_INFO, "Total time spent executing FspSiliconInitApi: %d > millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () - > TimeStampCounterStart), 1000000))); > > // > -- > 2.10.0.windows.1
_______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
