Agree with Jiewen's solution. Default should be 0 in IntelFsp2WrapperPkg and CorebootPayloadPkg can set BIT16 to skip the API.
Thanks, -Giri From: Yao, Jiewen Sent: Friday, October 21, 2016 10:15 PM To: Dong, Guo <guo.d...@intel.com>; Mudusuru, Giri P <giri.p.mudus...@intel.com>; edk2-devel@lists.01.org Cc: Ma, Maurice <maurice...@intel.com>; Yarlagadda, Satya P <satya.p.yarlaga...@intel.com> Subject: RE: [edk2] [PATCH] IntelFsp2WrapperPkg: Add a PCD to control if signaling first event. My thinking is to define mask for ALL APIs, not 3. We have 5 APIs, and 3 sub API for notify phase. How about this : # BIT0~15 is for function: # BIT0 - Mask TempRamInit # BIT1 - Mask MemoryInit # BIT2 - Mask TempRamExit # BIT3 - Mask SiliconInit # BIT4 - Mask NotifyPhase # BIT16~32 is for sub-function: # BIT16 - Mask NotifyPhase (AfterPciEnumeration) # BIT17 - Mask NotifyPhase (ReadyToBoot) # BIT18 - Mask NotifyPhase (EndOfFirmware) # Any undefined BITs are reserved for future use PcdFspApiSkipMask|UINT32 You can use BIT16 now. We may use BIT0+BIT2 later. And any other combination in the future. From: Dong, Guo Sent: Saturday, October 22, 2016 7:52 AM To: Yao, Jiewen <jiewen....@intel.com<mailto:jiewen....@intel.com>>; Mudusuru, Giri P <giri.p.mudus...@intel.com<mailto:giri.p.mudus...@intel.com>>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org> Cc: Ma, Maurice <maurice...@intel.com<mailto:maurice...@intel.com>>; Yarlagadda, Satya P <satya.p.yarlaga...@intel.com<mailto:satya.p.yarlaga...@intel.com>> Subject: RE: [edk2] [PATCH] IntelFsp2WrapperPkg: Add a PCD to control if signaling first event. I am OK with bit mask PCD. Now only 3 APIs in this driver. Do we really need UINT64? Thanks, Guo From: Yao, Jiewen Sent: Friday, October 21, 2016 4:23 PM To: Dong, Guo <guo.d...@intel.com<mailto:guo.d...@intel.com>>; Mudusuru, Giri P <giri.p.mudus...@intel.com<mailto:giri.p.mudus...@intel.com>>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org> Cc: Ma, Maurice <maurice...@intel.com<mailto:maurice...@intel.com>>; Yarlagadda, Satya P <satya.p.yarlaga...@intel.com<mailto:satya.p.yarlaga...@intel.com>> Subject: RE: [edk2] [PATCH] IntelFsp2WrapperPkg: Add a PCD to control if signaling first event. Understood. I agree that is a valid usage model. So how about we define a bit mask for every function? Such as "PcdFspApiSkipMask|UINT64" - I am open on any naming proposal. In the future we may need skip some other functions such as InitTempRam or TempRamExit. Thank you Yao Jiewen From: Dong, Guo Sent: Tuesday, October 18, 2016 1:11 PM To: Yao, Jiewen <jiewen....@intel.com<mailto:jiewen....@intel.com>>; Mudusuru, Giri P <giri.p.mudus...@intel.com<mailto:giri.p.mudus...@intel.com>>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org> Cc: Ma, Maurice <maurice...@intel.com<mailto:maurice...@intel.com>>; Yarlagadda, Satya P <satya.p.yarlaga...@intel.com<mailto:satya.p.yarlaga...@intel.com>> Subject: RE: [edk2] [PATCH] IntelFsp2WrapperPkg: Add a PCD to control if signaling first event. Hi Jiewen, For Coreboot boot loader, PCI device enumeration is done in coreboot, so it is nature Coreboot sends PciEnumerationComplete to FSP. UEFI payload would send FSP ReadyToBoot and EndOfFirmware notification. If there is other boot loader that sends ReadyToBoot and EndOfFirmware in different firmware component, we may add PCDs for them later. Thanks, Guo From: Yao, Jiewen Sent: Monday, October 17, 2016 9:10 PM To: Dong, Guo <guo.d...@intel.com<mailto:guo.d...@intel.com>>; Mudusuru, Giri P <giri.p.mudus...@intel.com<mailto:giri.p.mudus...@intel.com>>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org> Cc: Ma, Maurice <maurice...@intel.com<mailto:maurice...@intel.com>>; Yarlagadda, Satya P <satya.p.yarlaga...@intel.com<mailto:satya.p.yarlaga...@intel.com>>; Yao, Jiewen <jiewen....@intel.com<mailto:jiewen....@intel.com>> Subject: RE: [edk2] [PATCH] IntelFsp2WrapperPkg: Add a PCD to control if signaling first event. Hi I am a little concern on this as well. If today, there is a POC require skipping PciEnumerationComplete. There might be the other POC tomorrow to skip ReadyToBoot Then another POC to skip EventExitBootServices. We will be exhausted to add POC to skip each separately. Can this POC handle all 3 event together? Or not handle 3 event completely? Thank you Yao Jiewen From: Dong, Guo Sent: Tuesday, October 18, 2016 12:04 PM To: Mudusuru, Giri P <giri.p.mudus...@intel.com<mailto:giri.p.mudus...@intel.com>>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org> Cc: Yao, Jiewen <jiewen....@intel.com<mailto:jiewen....@intel.com>>; Ma, Maurice <maurice...@intel.com<mailto:maurice...@intel.com>>; Yarlagadda, Satya P <satya.p.yarlaga...@intel.com<mailto:satya.p.yarlaga...@intel.com>> Subject: RE: [edk2] [PATCH] IntelFsp2WrapperPkg: Add a PCD to control if signaling first event. Hi Giri, Thank you for the comment. In our POC implementation, Coreboot will notify FSP EnumerationComplete. And in UEFI payload, the other 2 FSP notifications will be called from FspWrapperNotifyDxe. Thanks, Guo -----Original Message----- From: Mudusuru, Giri P Sent: Monday, October 17, 2016 8:32 PM To: Dong, Guo <guo.d...@intel.com<mailto:guo.d...@intel.com>>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org> Cc: Yao, Jiewen <jiewen....@intel.com<mailto:jiewen....@intel.com>>; Ma, Maurice <maurice...@intel.com<mailto:maurice...@intel.com>>; Yarlagadda, Satya P <satya.p.yarlaga...@intel.com<mailto:satya.p.yarlaga...@intel.com>> Subject: RE: [edk2] [PATCH] IntelFsp2WrapperPkg: Add a PCD to control if signaling first event. Hello Guo, FSP wrapper and Coreboot are bootloaders consuming FSP binary. FSP must get called Post PCI bus enumeration to do the required silicon initialization. Why do we need a PCD to skip it? Thanks, -Giri > -----Original Message----- > From: Dong, Guo > Sent: Monday, October 17, 2016 3:53 PM > To: edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org> > Cc: Yao, Jiewen <jiewen....@intel.com<mailto:jiewen....@intel.com>>; > Mudusuru, Giri P > <giri.p.mudus...@intel.com<mailto:giri.p.mudus...@intel.com>>; Dong, Guo > <guo.d...@intel.com<mailto:guo.d...@intel.com>> > Subject: [edk2] [PATCH] IntelFsp2WrapperPkg: Add a PCD to control if > signaling first event. > > PciEnumerationComplete might be signaled to FSP in Coreboot. Add a PCD > PcdNotifyPciEnumerationComplete so FspWrapperNotifyDxe driver could be > used in this case. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: gdong1 <guo.d...@intel.com<mailto:guo.d...@intel.com>> > --- > .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.c | 18 > ++++++++++-------- > .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf | 3 ++- > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 5 +++++ > 3 files changed, 17 insertions(+), 9 deletions(-) > > diff --git > a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > index 0797f44..45eae4b 100644 > --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > +++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > @@ -246,14 +246,16 @@ FspWrapperNotifyDxeEntryPoint ( > return EFI_SUCCESS; > } > > - ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent ( > - &gEfiPciEnumerationCompleteProtocolGuid, > - TPL_CALLBACK, > - OnPciEnumerationComplete, > - NULL, > - &Registration > - ); > - ASSERT (ProtocolNotifyEvent != NULL); > + if (PcdGetBool(PcdNotifyPciEnumerationComplete)) { > + ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent ( > + &gEfiPciEnumerationCompleteProtocolGuid, > + TPL_CALLBACK, > + OnPciEnumerationComplete, > + NULL, > + &Registration > + ); > + ASSERT (ProtocolNotifyEvent != NULL); } > > Status = EfiCreateEventReadyToBootEx ( > TPL_CALLBACK, > diff --git > a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf > b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf > index f851f68..f28356d 100644 > --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf > +++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf > @@ -61,7 +61,8 @@ > gFspHobGuid ## CONSUMES ## HOB > > [Pcd] > - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## > CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdNotifyPciEnumerationComplete ## > CONSUMES > > [Depex] > TRUE > diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > index d9d2d80..52ed9d8 100644 > --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > @@ -74,6 +74,11 @@ > ## This is the base address of FSP-T/M/S > > gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32| > 0x00000300 > > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32 > |0x00000301 > + ## Indicates if the FSP wrapper will notify FSP > PciEnumerationComplete.<BR><BR> > + # TRUE - FSP wrapper will notify PciEnumerationComplete to FSP.<BR> > + # FALSE - FSP wrapper will NOT notify PciEnumerationComplete to FSP.<BR> > + # @Prompt Notify FSP PciEnumerationComplete. > + > gIntelFsp2WrapperTokenSpaceGuid.PcdNotifyPciEnumerationComplete|TRUE| > BOOLEAN|0x40000009 > > [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx] > > gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32| > 0x00001001 > -- > 2.7.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel